move /CS signal from '138 back to AT-Mega

fix several issues on the board and the schematic. From my recollection:

- add to the back solder mask (solder pads on the back where missing):
	- Mini DIN 6
	- LEDs
- switch 5V and 12V of the MOLEX connector
- switch DATAIN and DATAOUT connections of the SD-Card
- Rotate Transistor graphic to indicate how the  TO92 transistor has to be placed
- correct resistor namings (R6, 3R4)
- add jumper JP5 for /RST generation when the EFS connector is in use
- move the SPI and the HDD-power socket to the right
- enlarge the holes for the MOLEX and the HDD-power connectors
- enlarge the fixating hole of the MOLEX connector
- add polarisation indicators (Silk) for the polarised capacitors to better indicate how to place them

board revision is now v1.1
software version is 0.91
This commit is contained in:
Oliver Lehmann 2013-04-20 23:22:47 +00:00
parent 1048ffcfc0
commit f1beecd517
28 changed files with 8241 additions and 7673 deletions

View File

@ -137,8 +137,8 @@ OUTPUT_FILE_DEP:= ./makedep.mk
./%.o: .././%.c ./%.o: .././%.c
@echo Building file: $< @echo Building file: $<
@echo Invoking: AVR/GNU C Compiler : (AVR_8_bit_GNU_Toolchain_3.4.0_663) 4.6.2 @echo Invoking: AVR/GNU C Compiler : (AVR_8_bit_GNU_Toolchain_3.4.1_830) 4.6.2
$(QUOTE)C:\Program Files (x86)\Atmel\Atmel Studio 6.0\extensions\Atmel\AVRGCC\3.4.0.65\AVRToolchain\bin\avr-gcc.exe$(QUOTE) -funsigned-char -funsigned-bitfields -O1 -ffunction-sections -fpack-struct -fshort-enums -Wall -Wundef -Werror -pedantic -pedantic-errors -c -save-temps -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -mmcu=atmega1284p -o"$@" "$<" $(QUOTE)C:\Program Files (x86)\Atmel\Atmel Studio 6.0\extensions\Atmel\AVRGCC\3.4.1.95\AVRToolchain\bin\avr-gcc.exe$(QUOTE) -funsigned-char -funsigned-bitfields -O1 -ffunction-sections -fpack-struct -fshort-enums -Wall -Wundef -Werror -pedantic -pedantic-errors -c -save-temps -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -mmcu=atmega1284p -o"$@" "$<"
@echo Finished building: $< @echo Finished building: $<
@ -165,13 +165,14 @@ all: $(OUTPUT_FILE_PATH) $(ADDITIONAL_DEPENDENCIES)
$(OUTPUT_FILE_PATH): $(OBJS) $(USER_OBJS) $(OUTPUT_FILE_DEP) $(OUTPUT_FILE_PATH): $(OBJS) $(USER_OBJS) $(OUTPUT_FILE_DEP)
@echo Building target: $@ @echo Building target: $@
@echo Invoking: AVR/GNU Linker : (AVR_8_bit_GNU_Toolchain_3.4.0_663) 4.6.2 @echo Invoking: AVR/GNU Linker : (AVR_8_bit_GNU_Toolchain_3.4.1_830) 4.6.2
$(QUOTE)C:\Program Files (x86)\Atmel\Atmel Studio 6.0\extensions\Atmel\AVRGCC\3.4.0.65\AVRToolchain\bin\avr-gcc.exe$(QUOTE) -o$(OUTPUT_FILE_PATH_AS_ARGS) $(OBJS_AS_ARGS) $(USER_OBJS) $(LIBS) -Wl,-Map="P8000_WDC_Emulator.map" -Wl,--start-group -Wl,-lm -Wl,--end-group -Wl,--gc-sections -mmcu=atmega1284p $(QUOTE)C:\Program Files (x86)\Atmel\Atmel Studio 6.0\extensions\Atmel\AVRGCC\3.4.1.95\AVRToolchain\bin\avr-gcc.exe$(QUOTE) -o$(OUTPUT_FILE_PATH_AS_ARGS) $(OBJS_AS_ARGS) $(USER_OBJS) $(LIBS) -Wl,-Map="P8000_WDC_Emulator.map" -Wl,--start-group -Wl,-lm -Wl,--end-group -Wl,--gc-sections -mmcu=atmega1284p
@echo Finished building target: $@ @echo Finished building target: $@
"C:\Program Files (x86)\Atmel\Atmel Studio 6.0\extensions\Atmel\AVRGCC\3.4.0.65\AVRToolchain\bin\avr-objcopy.exe" -O ihex -R .eeprom -R .fuse -R .lock -R .signature "P8000_WDC_Emulator.elf" "P8000_WDC_Emulator.hex" "C:\Program Files (x86)\Atmel\Atmel Studio 6.0\extensions\Atmel\AVRGCC\3.4.1.95\AVRToolchain\bin\avr-objcopy.exe" -O ihex -R .eeprom -R .fuse -R .lock -R .signature "P8000_WDC_Emulator.elf" "P8000_WDC_Emulator.hex"
"C:\Program Files (x86)\Atmel\Atmel Studio 6.0\extensions\Atmel\AVRGCC\3.4.0.65\AVRToolchain\bin\avr-objcopy.exe" -j .eeprom --set-section-flags=.eeprom=alloc,load --change-section-lma .eeprom=0 --no-change-warnings -O ihex "P8000_WDC_Emulator.elf" "P8000_WDC_Emulator.eep" || exit 0 "C:\Program Files (x86)\Atmel\Atmel Studio 6.0\extensions\Atmel\AVRGCC\3.4.1.95\AVRToolchain\bin\avr-objcopy.exe" -j .eeprom --set-section-flags=.eeprom=alloc,load --change-section-lma .eeprom=0 --no-change-warnings -O ihex "P8000_WDC_Emulator.elf" "P8000_WDC_Emulator.eep" || exit 0
"C:\Program Files (x86)\Atmel\Atmel Studio 6.0\extensions\Atmel\AVRGCC\3.4.0.65\AVRToolchain\bin\avr-objdump.exe" -h -S "P8000_WDC_Emulator.elf" > "P8000_WDC_Emulator.lss" "C:\Program Files (x86)\Atmel\Atmel Studio 6.0\extensions\Atmel\AVRGCC\3.4.1.95\AVRToolchain\bin\avr-objdump.exe" -h -S "P8000_WDC_Emulator.elf" > "P8000_WDC_Emulator.lss"
"C:\Program Files (x86)\Atmel\Atmel Studio 6.0\extensions\Atmel\AVRGCC\3.4.0.65\AVRToolchain\bin\avr-size.exe" "P8000_WDC_Emulator.elf" "C:\Program Files (x86)\Atmel\Atmel Studio 6.0\extensions\Atmel\AVRGCC\3.4.1.95\AVRToolchain\bin\avr-objcopy.exe" -O srec -R .eeprom -R .fuse -R .lock -R .signature "P8000_WDC_Emulator.elf" "P8000_WDC_Emulator.srec"
"C:\Program Files (x86)\Atmel\Atmel Studio 6.0\extensions\Atmel\AVRGCC\3.4.1.95\AVRToolchain\bin\avr-size.exe" "P8000_WDC_Emulator.elf"
@ -181,5 +182,5 @@ $(OUTPUT_FILE_PATH): $(OBJS) $(USER_OBJS) $(OUTPUT_FILE_DEP)
# Other Targets # Other Targets
clean: clean:
-$(RM) $(OBJS_AS_ARGS)$(C_DEPS_AS_ARGS) $(EXECUTABLES) -$(RM) $(OBJS_AS_ARGS)$(C_DEPS_AS_ARGS) $(EXECUTABLES)
rm -rf "P8000_WDC_Emulator.elf" "P8000_WDC_Emulator.a" "P8000_WDC_Emulator.hex" "P8000_WDC_Emulator.lss" "P8000_WDC_Emulator.eep" "P8000_WDC_Emulator.map" rm -rf "P8000_WDC_Emulator.elf" "P8000_WDC_Emulator.a" "P8000_WDC_Emulator.hex" "P8000_WDC_Emulator.lss" "P8000_WDC_Emulator.eep" "P8000_WDC_Emulator.map" "P8000_WDC_Emulator.srec"

View File

@ -1,4 +1,4 @@
Cmp-Mod V01 Created by CvPcb (2012-01-19 BZR 3256)-stable date = 23/06/2012 18:33:05 Cmp-Mod V01 Genere par PcbNew le 21/04/2013 00:07:31
BeginCmp BeginCmp
TimeStamp = /4FDF8116; TimeStamp = /4FDF8116;
@ -221,7 +221,7 @@ BeginCmp
TimeStamp = /4FE371A3; TimeStamp = /4FE371A3;
Reference = D3; Reference = D3;
ValeurCmp = LM317; ValeurCmp = LM317;
IdModule = TO92; IdModule = TO92-LM317;
EndCmp EndCmp
BeginCmp BeginCmp
@ -280,6 +280,13 @@ ValeurCmp = JUMPER;
IdModule = PIN_ARRAY_2X1; IdModule = PIN_ARRAY_2X1;
EndCmp EndCmp
BeginCmp
TimeStamp = /51730FFF;
Reference = JP5;
ValeurCmp = JUMPER;
IdModule = PIN_ARRAY_2X1;
EndCmp
BeginCmp BeginCmp
TimeStamp = /4FDF5237; TimeStamp = /4FDF5237;
Reference = Q1; Reference = Q1;
@ -333,7 +340,7 @@ BeginCmp
TimeStamp = /4FE36B44; TimeStamp = /4FE36B44;
Reference = X1; Reference = X1;
ValeurCmp = CONN_5X2; ValeurCmp = CONN_5X2;
IdModule = pin_array_6x2; IdModule = PIN_ARRAY_5x2;
EndCmp EndCmp
BeginCmp BeginCmp
@ -375,7 +382,7 @@ BeginCmp
TimeStamp = /4FE091E5; TimeStamp = /4FE091E5;
Reference = X7; Reference = X7;
ValeurCmp = HDD_POWER; ValeurCmp = HDD_POWER;
IdModule = PIN_ARRAY_4x1; IdModule = HDD_POWER;
EndCmp EndCmp
BeginCmp BeginCmp

View File

@ -1,13 +1,17 @@
PCBNEW-LibModule-V1 25/06/2012 17:18:36 PCBNEW-LibModule-V1 21/04/2013 00:07:00
# encoding utf-8 # encoding utf-8
$INDEX $INDEX
4PIN_MOLEX 4PIN_MOLEX
EFS26 EFS26
HDD_POWER
HOLE_4mm HOLE_4mm
HOLE_4x8mm HOLE_4x8mm
LED-5MM
MINI_DIN6 MINI_DIN6
PCB_PUSH PCB_PUSH
PIN_ARRAY_5x2
SW_6x6 SW_6x6
TO92-LM317
crystal_hc-49s crystal_hc-49s
mini_din-M_DIN6 mini_din-M_DIN6
pin_strip_6 pin_strip_6
@ -299,161 +303,6 @@ Of 0.000000 0.000000 0.000000
Ro 0.000000 0.000000 0.000000 Ro 0.000000 0.000000 0.000000
$EndSHAPE3D $EndSHAPE3D
$EndMODULE pin_strip_6 $EndMODULE pin_strip_6
$MODULE 4PIN_MOLEX
Po 0 0 0 15 4FE46B17 00000000 ~~
Li 4PIN_MOLEX
Sc 00000000
AR 4PIN_MOLEX
Op 0 0 0
T0 0 -1600 600 600 0 120 N V 21 N "4PIN_MOLEX"
T1 50 -3550 600 600 0 120 N V 21 N "VAL**"
DS -4550 -600 -4550 -5150 150 21
DS 4550 -600 4550 -5150 150 21
DS 4550 -600 -4550 -600 150 21
DS -4550 -5150 4550 -5150 150 21
$PAD
Sh "3" C 787 787 0 0 0
Dr 354 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -1000 0
$EndPAD
$PAD
Sh "2" C 787 787 0 0 0
Dr 354 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 1000 0
$EndPAD
$PAD
Sh "1" C 787 787 0 0 0
Dr 354 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 3000 0
$EndPAD
$PAD
Sh "4" C 787 787 0 0 0
Dr 354 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -3000 0
$EndPAD
$PAD
Sh "" C 906 906 0 0 0
Dr 906 0 0
At HOLE N 00E0FFFF
Ne 0 ""
Po 4000 -1424
$EndPAD
$PAD
Sh "" C 906 906 0 0 0
Dr 906 0 0
At HOLE N 00E0FFFF
Ne 0 ""
Po -4000 -1424
$EndPAD
$PAD
Sh "" O 1181 906 0 0 0
Dr 1181 0 0 O 1181 906
At HOLE N 00E0FFFF
Ne 0 ""
Po 2000 -4550
$EndPAD
$PAD
Sh "" O 1181 906 0 0 0
Dr 1181 0 0 O 1181 906
At HOLE N 00E0FFFF
Ne 0 ""
Po -2000 -4550
$EndPAD
$EndMODULE 4PIN_MOLEX
$MODULE mini_din-M_DIN6
Po 0 0 0 15 4FE46C70 00000000 ~~
Li mini_din-M_DIN6
Sc 00000000
AR mini_din-M_DIN6
Op 0 0 0
At VIRTUAL
T0 0 2600 320 320 0 35 N V 21 N "VAL**"
T1 0 -1450 320 320 0 35 N V 21 N "MINI_DIN_6"
DS 2755 -1870 -2755 -1870 50 21
DS -2755 -1870 -2755 -98 50 21
DS -2755 -98 -2755 3169 50 21
DS -2755 3169 2755 3149 50 21
DS 2755 3149 2755 688 50 21
DS 2755 688 2755 -98 50 21
DS 2755 -98 2755 -1870 50 21
DS 2755 -98 2637 -98 50 21
DS 2637 -98 2637 688 50 21
DS 2637 688 2755 688 50 21
DS -2755 -98 -2637 -98 50 21
DS -2637 -98 -2637 688 50 21
DS -2637 688 -2736 688 50 21
$PAD
Sh "1" C 560 1120 0 0 0
Dr 354 0 0
At STD N 00A88001
Ne 0 ""
Po -511 1476
$EndPAD
$PAD
Sh "2" C 560 1120 0 0 0
Dr 354 0 0
At STD N 00A88001
Ne 0 ""
Po 511 1476
$EndPAD
$PAD
Sh "3" C 560 1120 0 0 0
Dr 354 0 0
At STD N 00A88001
Ne 0 ""
Po -1338 1476
$EndPAD
$PAD
Sh "5" C 560 1120 0 0 0
Dr 354 0 0
At STD N 00A88001
Ne 0 ""
Po 1338 1476
$EndPAD
$PAD
Sh "6" C 560 1120 0 0 0
Dr 354 0 0
At STD N 00A88001
Ne 0 ""
Po -1338 2440
$EndPAD
$PAD
Sh "8" C 560 1120 0 0 0
Dr 354 0 0
At STD N 00A88001
Ne 0 ""
Po 1338 2460
$EndPAD
$PAD
Sh "SH1" C 1377 1377 0 0 0
Dr 905 0 0
At STD N 00A88001
Ne 0 ""
Po 2677 295
$EndPAD
$PAD
Sh "SH2" C 1377 1377 0 0 0
Dr 905 0 0
At STD N 00A88001
Ne 0 ""
Po 0 -19
$EndPAD
$PAD
Sh "SH3" C 1377 1377 0 0 0
Dr 905 0 0
At STD N 00A88001
Ne 0 ""
Po -2657 295
$EndPAD
$EndMODULE mini_din-M_DIN6
$MODULE HOLE_4mm $MODULE HOLE_4mm
Po 0 0 0 15 4FE4B4CE 00000000 ~~ Po 0 0 0 15 4FE4B4CE 00000000 ~~
Li HOLE_4mm Li HOLE_4mm
@ -874,7 +723,7 @@ Ro 0.000000 0.000000 0.000000
$EndSHAPE3D $EndSHAPE3D
$EndMODULE SW_6x6 $EndMODULE SW_6x6
$MODULE EFS26 $MODULE EFS26
Po 0 0 0 15 4FE88149 00000000 ~~ Po 0 0 0 15 4FEC9F9A 00000000 ~~
Li EFS26 Li EFS26
Cd Pin strip 13x2pin Cd Pin strip 13x2pin
Kw CONN DEV Kw CONN DEV
@ -1051,7 +900,7 @@ Ne 0 ""
Po 4921 492 Po 4921 492
$EndPAD $EndPAD
$PAD $PAD
Sh "B13" O 600 787 0 0 0 Sh "B12" O 600 787 0 0 0
Dr 394 0 -98 Dr 394 0 -98
At STD N 00E0FFFF At STD N 00E0FFFF
Ne 0 "" Ne 0 ""
@ -1065,7 +914,7 @@ Ne 0 ""
Po 5906 492 Po 5906 492
$EndPAD $EndPAD
$PAD $PAD
Sh "B14" O 600 787 0 0 0 Sh "B13" O 600 787 0 0 0
Dr 394 0 -98 Dr 394 0 -98
At STD N 00E0FFFF At STD N 00E0FFFF
Ne 0 "" Ne 0 ""
@ -1078,4 +927,393 @@ Of 0.000000 0.000000 0.000000
Ro 0.000000 0.000000 0.000000 Ro 0.000000 0.000000 0.000000
$EndSHAPE3D $EndSHAPE3D
$EndMODULE EFS26 $EndMODULE EFS26
$MODULE 4PIN_MOLEX
Po 0 0 0 15 51716E4E 00000000 ~~
Li 4PIN_MOLEX
Sc 00000000
AR 4PIN_MOLEX
Op 0 0 0
T0 0 -1600 600 600 0 120 N V 21 N "4PIN_MOLEX"
T1 50 -3550 600 600 0 120 N V 21 N "VAL**"
DS -4550 -600 -4550 -5150 150 21
DS 4550 -600 4550 -5150 150 21
DS 4550 -600 -4550 -600 150 21
DS -4550 -5150 4550 -5150 150 21
$PAD
Sh "2" C 1575 1575 0 0 0
Dr 787 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -1000 0
$EndPAD
$PAD
Sh "3" C 1575 1575 0 0 0
Dr 787 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 1000 0
$EndPAD
$PAD
Sh "4" C 1575 1575 0 0 0
Dr 787 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 3000 0
$EndPAD
$PAD
Sh "1" C 1575 1575 0 0 0
Dr 787 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -3000 0
$EndPAD
$PAD
Sh "" C 906 906 0 0 0
Dr 906 0 0
At HOLE N 00E0FFFF
Ne 0 ""
Po 4000 -1424
$EndPAD
$PAD
Sh "" C 906 906 0 0 0
Dr 906 0 0
At HOLE N 00E0FFFF
Ne 0 ""
Po -4000 -1424
$EndPAD
$PAD
Sh "" O 1969 1378 0 0 0
Dr 1969 0 0 O 1969 1378
At HOLE N 00E0FFFF
Ne 0 ""
Po 2000 -4275
$EndPAD
$PAD
Sh "" O 1969 1378 0 0 0
Dr 1969 0 0 O 1969 1378
At HOLE N 00E0FFFF
Ne 0 ""
Po -2000 -4275
$EndPAD
$EndMODULE 4PIN_MOLEX
$MODULE mini_din-M_DIN6
Po 0 0 0 15 517176CD 00000000 ~~
Li mini_din-M_DIN6
Sc 00000000
AR /4FE2B9E3
Op 0 0 0
At VIRTUAL
T0 0 2600 320 320 0 35 N V 21 N "X5"
T1 0 -1450 320 320 0 35 N I 21 N "MINI_DIN_6"
DS 2755 -1870 -2755 -1870 50 21
DS -2755 -1870 -2755 -98 50 21
DS -2755 -98 -2755 3169 50 21
DS -2755 3169 2755 3149 50 21
DS 2755 3149 2755 688 50 21
DS 2755 688 2755 -98 50 21
DS 2755 -98 2755 -1870 50 21
DS 2755 -98 2637 -98 50 21
DS 2637 -98 2637 688 50 21
DS 2637 688 2755 688 50 21
DS -2755 -98 -2637 -98 50 21
DS -2637 -98 -2637 688 50 21
DS -2637 688 -2736 688 50 21
$PAD
Sh "1" C 560 560 0 0 0
Dr 354 0 0
At STD N 00E8FFFF
Ne 1 "+12V"
Po -511 1476
$EndPAD
$PAD
Sh "2" C 560 560 0 0 0
Dr 354 0 0
At STD N 00E8FFFF
Ne 1 "+12V"
Po 511 1476
$EndPAD
$PAD
Sh "3" C 560 560 0 0 0
Dr 354 0 0
At STD N 00E8FFFF
Ne 3 "VCC"
Po -1338 1476
$EndPAD
$PAD
Sh "5" C 560 560 0 0 0
Dr 354 0 0
At STD N 00E8FFFF
Ne 2 "GND"
Po 1338 1476
$EndPAD
$PAD
Sh "6" C 560 560 0 0 0
Dr 354 0 0
At STD N 00E8FFFF
Ne 3 "VCC"
Po -1338 2440
$EndPAD
$PAD
Sh "8" C 560 560 0 0 0
Dr 354 0 0
At STD N 00E8FFFF
Ne 2 "GND"
Po 1338 2460
$EndPAD
$PAD
Sh "SH1" C 1377 1377 0 0 0
Dr 905 0 0
At STD N 00E8FFFF
Ne 2 "GND"
Po 2677 295
$EndPAD
$PAD
Sh "SH2" C 1377 1377 0 0 0
Dr 905 0 0
At STD N 00E8FFFF
Ne 2 "GND"
Po 0 -19
$EndPAD
$PAD
Sh "SH3" C 1377 1377 0 0 0
Dr 905 0 0
At STD N 00E8FFFF
Ne 2 "GND"
Po -2657 295
$EndPAD
$SHAPE3D
Na "minidin_6.wrl"
Sc 1.000000 1.000000 1.000000
Of 0.000000 -0.100000 0.000000
Ro 0.000000 0.000000 180.000000
$EndSHAPE3D
$EndMODULE mini_din-M_DIN6
$MODULE LED-5MM
Po 0 0 0 15 517179BF 00000000 ~~
Li LED-5MM
Cd LED 5mm - Lead pitch 100mil (2,54mm)
Kw LED led 5mm 5MM 100mil 2,54mm
Sc 00000000
AR /4FDF74B9
Op 0 0 0
T0 0 -1500 300 300 0 35 N V 21 N "1L1"
T1 0 1500 300 300 0 35 N I 21 N "LED"
DS 1120 750 1120 -750 80 21
DC 100 0 -400 500 30 21
DA 100 0 1100 750 2862 100 21
DA 100 0 -350 0 900 60 21
DA 100 0 550 0 900 60 21
DA 100 0 -550 0 900 60 21
DA 100 0 750 0 900 60 21
DA 100 0 -750 0 900 60 21
DA 100 0 950 0 900 60 21
$PAD
Sh "1" C 660 660 0 0 0
Dr 320 0 0
At STD N 00E8FFFF
Ne 2 "N-000032"
Po -500 0
$EndPAD
$PAD
Sh "2" C 660 660 0 0 0
Dr 320 0 0
At STD N 00E8FFFF
Ne 1 "GND"
Po 500 0
$EndPAD
$SHAPE3D
Na "discret/leds/led5_vertical_verde.wrl"
Sc 1.000000 1.000000 1.000000
Of 0.000000 0.000000 0.000000
Ro 0.000000 0.000000 0.000000
$EndSHAPE3D
$EndMODULE LED-5MM
$MODULE HDD_POWER
Po 0 0 0 15 5171A0BB 00000000 ~~
Li HDD_POWER
Cd Double rangee de contacts 2 x 5 pins
Kw CONN
Sc 00000000
AR /4FE091E5
Op 0 0 0
T0 225 -1300 400 400 0 80 N V 21 N "X7"
T1 300 1300 400 400 0 80 N I 21 N "HDD_POWER"
DS -2700 -900 3575 -900 150 21
DS 3575 -900 3575 800 150 21
DS 3575 800 3575 900 150 21
DS 3575 900 -2900 900 150 21
DS -2900 900 -2900 -900 150 21
DS -2900 -900 -2650 -900 150 21
$PAD
Sh "1" R 1181 1181 0 0 0
Dr 787 0 0
At STD N 00E0FFFF
Ne 3 "VCC"
Po -2075 0
$EndPAD
$PAD
Sh "2" C 1181 1181 0 0 0
Dr 787 0 0
At STD N 00E0FFFF
Ne 2 "GND"
Po -475 0
$EndPAD
$PAD
Sh "3" C 1181 1181 0 0 0
Dr 787 0 0
At STD N 00E0FFFF
Ne 2 "GND"
Po 1125 0
$EndPAD
$PAD
Sh "4" C 1181 1181 0 0 0
Dr 787 0 0
At STD N 00E0FFFF
Ne 1 "+12V"
Po 2725 0
$EndPAD
$SHAPE3D
Na "pin_array\\pins_array_4x1.wrl"
Sc 1.000000 1.000000 1.000000
Of 0.000000 0.000000 0.000000
Ro 0.000000 0.000000 0.000000
$EndSHAPE3D
$EndMODULE HDD_POWER
$MODULE TO92-LM317
Po 0 0 0 15 5171C2BD 00000000 ~~
Li TO92-LM317
Cd Transistor TO92 brochage type BC237
Kw TR TO92
Sc 00000000
AR /4FE371A3
Op 0 0 0
T0 425 1025 400 400 0 80 N V 21 N "D3"
T1 -1600 -1625 400 400 0 80 N V 21 N "LM317"
DS -500 1000 1000 -500 120 21
DS 1000 -500 1000 -1000 120 21
DS 1000 -1000 500 -1500 120 21
DS 500 -1500 -500 -1500 120 21
DS -500 -1500 -1500 -500 120 21
DS -1500 -500 -1500 500 120 21
DS -1500 500 -1000 1000 120 21
DS -1000 1000 -500 1000 120 21
$PAD
Sh "1" R 550 550 0 0 0
Dr 320 0 0
At STD N 00E0FFFF
Ne 2 "N-000108"
Po -500 500
$EndPAD
$PAD
Sh "2" C 550 550 0 0 0
Dr 320 0 0
At STD N 00E0FFFF
Ne 1 "+3.3V"
Po -500 -500
$EndPAD
$PAD
Sh "3" C 550 550 0 0 0
Dr 320 0 0
At STD N 00E0FFFF
Ne 3 "VCC"
Po 500 -500
$EndPAD
$SHAPE3D
Na "discret/to98.wrl"
Sc 1.000000 1.000000 1.000000
Of 0.000000 0.000000 0.000000
Ro 0.000000 0.000000 0.000000
$EndSHAPE3D
$EndMODULE TO92-LM317
$MODULE PIN_ARRAY_5x2
Po 0 0 0 15 3FCF2109 00000000 ~~
Li PIN_ARRAY_5x2
Cd Double rangee de contacts 2 x 5 pins
Kw CONN
Sc 00000000
AR
Op 0 0 0
T0 250 -1500 400 400 0 80 N V 21 N "PIN_ARRAY_5X2"
T1 0 -1500 400 400 0 80 N I 21 N "Val**"
DS -2500 -1000 2500 -1000 120 21
DS 2500 -1000 2500 1000 120 21
DS 2500 1000 -2500 1000 120 21
DS -2500 1000 -2500 -1000 120 21
$PAD
Sh "1" R 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -2000 500
$EndPAD
$PAD
Sh "2" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -2000 -500
$EndPAD
$PAD
Sh "3" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -1000 500
$EndPAD
$PAD
Sh "4" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -1000 -500
$EndPAD
$PAD
Sh "5" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 0 500
$EndPAD
$PAD
Sh "6" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 0 -500
$EndPAD
$PAD
Sh "7" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 1000 500
$EndPAD
$PAD
Sh "8" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 1000 -500
$EndPAD
$PAD
Sh "9" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 2000 500
$EndPAD
$PAD
Sh "10" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 2000 -500
$EndPAD
$SHAPE3D
Na "pin_array/pins_array_5x2.wrl"
Sc 1.000000 1.000000 1.000000
Of 0.000000 0.000000 0.000000
Ro 0.000000 0.000000 0.000000
$EndSHAPE3D
$EndMODULE PIN_ARRAY_5x2
$EndLIBRARY $EndLIBRARY

View File

@ -1,4 +1,4 @@
# EESchema Netlist Version 1.1 created 23/06/2012 18:33:05 # EESchema Netlist Version 1.1 created 21/04/2013 00:03:49
( (
( /4FDF8116 C1 1C1 100n ( /4FDF8116 C1 1C1 100n
( 1 VCC ) ( 1 VCC )
@ -9,21 +9,21 @@
( 2 N-000096 ) ( 2 N-000096 )
) )
( /4FDF527D C1 1C6 22p ( /4FDF527D C1 1C6 22p
( 1 N-000085 ) ( 1 N-000132 )
( 2 GND ) ( 2 GND )
) )
( /4FDF660D DIP-20__300 1D4 74HCT573 ( /4FDF660D DIP-20__300 1D4 74HCT573
( 1 N-000001 ) ( 1 N-000003 )
( 2 N-000111 ) ( 2 N-000113 )
( 3 N-000133 ) ( 3 N-000131 )
( 4 N-000109 ) ( 4 N-000114 )
( 5 N-000114 ) ( 5 N-000116 )
( 6 N-000112 ) ( 6 N-000111 )
( 7 N-000131 ) ( 7 N-000002 )
( 8 N-000113 ) ( 8 N-000115 )
( 9 N-000132 ) ( 9 N-000130 )
( 10 GND ) ( 10 GND )
( 11 N-000110 ) ( 11 N-000112 )
( 12 /PA7 ) ( 12 /PA7 )
( 13 /PA6 ) ( 13 /PA6 )
( 14 /PA5 ) ( 14 /PA5 )
@ -53,7 +53,7 @@
( 16 /D2 ) ( 16 /D2 )
( 17 /D1 ) ( 17 /D1 )
( 18 /D0 ) ( 18 /D0 )
( 19 N-000101 ) ( 19 N-000103 )
( 20 VCC ) ( 20 VCC )
) )
( /4FDF74B9 LED-5MM 1L1 LED ( /4FDF74B9 LED-5MM 1L1 LED
@ -70,14 +70,14 @@
) )
( /4FDE2EA3 C1 2C2 330n ( /4FDE2EA3 C1 2C2 330n
( 1 GND ) ( 1 GND )
( 2 N-000090 ) ( 2 N-000097 )
) )
( /4FDF52C6 C1 2C6 22p ( /4FDF52C6 C1 2C6 22p
( 1 GND ) ( 1 GND )
( 2 N-000102 ) ( 2 N-000088 )
) )
( /4FDF65CE DIP-20__300 2D4 74HCT573 ( /4FDF65CE DIP-20__300 2D4 74HCT573
( 1 N-000108 ) ( 1 N-000110 )
( 2 /PA0 ) ( 2 /PA0 )
( 3 /PA1 ) ( 3 /PA1 )
( 4 /PA2 ) ( 4 /PA2 )
@ -87,15 +87,15 @@
( 8 /PA6 ) ( 8 /PA6 )
( 9 /PA7 ) ( 9 /PA7 )
( 10 GND ) ( 10 GND )
( 11 N-000026 ) ( 11 N-000028 )
( 12 N-000132 ) ( 12 N-000130 )
( 13 N-000113 ) ( 13 N-000115 )
( 14 N-000131 ) ( 14 N-000002 )
( 15 N-000112 ) ( 15 N-000111 )
( 16 N-000114 ) ( 16 N-000116 )
( 17 N-000109 ) ( 17 N-000114 )
( 18 N-000133 ) ( 18 N-000131 )
( 19 N-000111 ) ( 19 N-000113 )
( 20 VCC ) ( 20 VCC )
) )
( /4FDE3327 DIP-20__300 2D6 74HCT245 ( /4FDE3327 DIP-20__300 2D6 74HCT245
@ -109,23 +109,23 @@
( 8 /PA6 ) ( 8 /PA6 )
( 9 /PA7 ) ( 9 /PA7 )
( 10 GND ) ( 10 GND )
( 11 N-000080 ) ( 11 N-000082 )
( 12 N-000080 ) ( 12 N-000082 )
( 13 N-000080 ) ( 13 N-000082 )
( 14 N-000080 ) ( 14 N-000082 )
( 15 N-000103 ) ( 15 N-000104 )
( 16 N-000079 ) ( 16 N-000080 )
( 17 N-000130 ) ( 17 N-000133 )
( 18 N-000081 ) ( 18 N-000081 )
( 19 N-000098 ) ( 19 N-000102 )
( 20 VCC ) ( 20 VCC )
) )
( /4FDF6D8E LED-5MM 2L1 LED ( /4FDF6D8E LED-5MM 2L1 LED
( 1 VCC ) ( 1 VCC )
( 2 N-000043 ) ( 2 N-000042 )
) )
( /4FDF6D7E R1 2R4 220 ( /4FDF6D7E R1 2R4 220
( 1 N-000043 ) ( 1 N-000042 )
( 2 N-000017 ) ( 2 N-000017 )
) )
( /4FDF5FEF C1 3C1 100n ( /4FDF5FEF C1 3C1 100n
@ -138,7 +138,7 @@
) )
( /4FDF60A7 R1 3R4 220 ( /4FDF60A7 R1 3R4 220
( 1 +3.3V ) ( 1 +3.3V )
( 2 N-000106 ) ( 2 N-000105 )
) )
( /4FDF60BB C1 4C1 100n ( /4FDF60BB C1 4C1 100n
( 1 VCC ) ( 1 VCC )
@ -193,17 +193,17 @@
( 2 //CS1 ) ( 2 //CS1 )
( 3 //ATA_WR ) ( 3 //ATA_WR )
( 4 //ATA_RD ) ( 4 //ATA_RD )
( 5 ? ) ( 5 N-000086 )
( 6 N-000115 ) ( 6 N-000118 )
( 7 N-000116 ) ( 7 N-000122 )
( 8 N-000104 ) ( 8 N-000106 )
( 9 N-000039 ) ( 9 N-000018 )
( 10 VCC ) ( 10 VCC )
( 11 GND ) ( 11 GND )
( 12 N-000085 ) ( 12 N-000132 )
( 13 N-000102 ) ( 13 N-000088 )
( 14 N-000091 ) ( 14 N-000073 )
( 15 N-000072 ) ( 15 N-000066 )
( 16 //DA0 ) ( 16 //DA0 )
( 17 //DA2 ) ( 17 //DA2 )
( 18 //DA1 ) ( 18 //DA1 )
@ -232,7 +232,7 @@
) )
( /4FDE2C78 DIP-16__300 D2 MAX3232 ( /4FDE2C78 DIP-16__300 D2 MAX3232
( 1 N-000095 ) ( 1 N-000095 )
( 2 N-000090 ) ( 2 N-000097 )
( 3 N-000094 ) ( 3 N-000094 )
( 4 N-000096 ) ( 4 N-000096 )
( 5 N-000093 ) ( 5 N-000093 )
@ -241,15 +241,15 @@
( 8 ? ) ( 8 ? )
( 9 ? ) ( 9 ? )
( 10 ? ) ( 10 ? )
( 11 N-000091 ) ( 11 N-000066 )
( 12 N-000072 ) ( 12 N-000073 )
( 13 N-000052 ) ( 13 N-000048 )
( 14 N-000117 ) ( 14 N-000123 )
( 15 GND ) ( 15 GND )
( 16 VCC ) ( 16 VCC )
) )
( /4FE371A3 TO92 D3 LM317 ( /4FE371A3 TO92-LM317 D3 LM317
( 1 N-000106 ) ( 1 N-000105 )
( 2 +3.3V ) ( 2 +3.3V )
( 3 VCC ) ( 3 VCC )
) )
@ -260,49 +260,49 @@
( 4 GND ) ( 4 GND )
( 5 GND ) ( 5 GND )
( 6 VCC ) ( 6 VCC )
( 7 N-000098 ) ( 7 N-000102 )
( 8 GND ) ( 8 GND )
( 9 ? ) ( 9 ? )
( 10 ? ) ( 10 ? )
( 11 N-000083 ) ( 11 ? )
( 12 N-000028 ) ( 12 N-000025 )
( 13 N-000128 ) ( 13 N-000129 )
( 14 N-000101 ) ( 14 N-000103 )
( 15 ? ) ( 15 ? )
( 16 VCC ) ( 16 VCC )
) )
( /4FDF63C6 DIP-14__300 D7 74HCT32 ( /4FDF63C6 DIP-14__300 D7 74HCT32
( 1 N-000128 ) ( 1 N-000129 )
( 2 //ATA_WR ) ( 2 //ATA_WR )
( 3 N-000108 ) ( 3 N-000110 )
( 4 //ATA_WR ) ( 4 //ATA_WR )
( 5 N-000028 ) ( 5 N-000025 )
( 6 N-000027 ) ( 6 N-000027 )
( 7 GND ) ( 7 GND )
( 8 N-000134 ) ( 8 N-000135 )
( 9 N-000128 ) ( 9 N-000129 )
( 10 //ATA_RD ) ( 10 //ATA_RD )
( 11 N-000001 ) ( 11 N-000003 )
( 12 //ATA_RD ) ( 12 //ATA_RD )
( 13 N-000028 ) ( 13 N-000025 )
( 14 VCC ) ( 14 VCC )
) )
( /4FE09BE0 DIP-14__300 D8 74HCT04 ( /4FE09BE0 DIP-14__300 D8 74HCT04
( 1 N-000027 ) ( 1 N-000027 )
( 2 N-000026 ) ( 2 N-000028 )
( 3 //RDY ) ( 3 //RDY )
( 4 N-000048 ) ( 4 N-000091 )
( 7 GND ) ( 7 GND )
( 8 /ASTB ) ( 8 /ASTB )
( 9 N-000101 ) ( 9 N-000103 )
( 10 //RST ) ( 10 N-000117 )
( 11 N-000126 ) ( 11 N-000038 )
( 12 N-000110 ) ( 12 N-000112 )
( 13 N-000134 ) ( 13 N-000135 )
( 14 VCC ) ( 14 VCC )
) )
( /4FDE1840 DIP-14__300 D9 74HCT03 ( /4FDE1840 DIP-14__300 D9 74HCT03
( 1 N-000048 ) ( 1 N-000091 )
( 2 /ASTB ) ( 2 /ASTB )
( 3 //ASTB ) ( 3 //ASTB )
( 4 /TR ) ( 4 /TR )
@ -316,62 +316,66 @@
( 2 GND ) ( 2 GND )
) )
( /4FDF4E3B PIN_ARRAY_2X1 JP2 JUMPER ( /4FDF4E3B PIN_ARRAY_2X1 JP2 JUMPER
( 1 N-000130 ) ( 1 N-000133 )
( 2 GND ) ( 2 GND )
) )
( /4FDF4E36 PIN_ARRAY_2X1 JP3 JUMPER ( /4FDF4E36 PIN_ARRAY_2X1 JP3 JUMPER
( 1 N-000079 ) ( 1 N-000080 )
( 2 GND ) ( 2 GND )
) )
( /4FDF4E32 PIN_ARRAY_2X1 JP4 JUMPER ( /4FDF4E32 PIN_ARRAY_2X1 JP4 JUMPER
( 1 N-000103 ) ( 1 N-000104 )
( 2 GND ) ( 2 GND )
) )
( /51730FFF PIN_ARRAY_2X1 JP5 JUMPER
( 1 N-000117 )
( 2 //RST )
)
( /4FDF5237 crystal_hc-49s Q1 CRYSTAL ( /4FDF5237 crystal_hc-49s Q1 CRYSTAL
( 1 N-000102 ) ( 1 N-000088 )
( 2 N-000085 ) ( 2 N-000132 )
) )
( /4FDF5E46 pin_strip_8 R1 1k8 ( /4FDF5E46 pin_strip_8 R1 1k8
( 1 N-000104 ) ( 1 N-000106 )
( 2 N-000084 ) ( 2 N-000087 )
( 3 N-000116 ) ( 3 N-000118 )
( 4 N-000105 ) ( 4 N-000108 )
( 5 N-000083 ) ( 5 N-000086 )
( 6 N-000082 ) ( 6 N-000085 )
( 7 ? ) ( 7 ? )
( 8 ? ) ( 8 ? )
) )
( /4FDF61F0 PIN_ARRAY_5x1 R2 3k3 ( /4FDF61F0 PIN_ARRAY_5x1 R2 3k3
( 1 GND ) ( 1 GND )
( 2 N-000082 ) ( 2 N-000085 )
( 3 N-000105 ) ( 3 N-000108 )
( 4 N-000084 ) ( 4 N-000087 )
( 5 ? ) ( 5 ? )
) )
( /4FDF534E R1 R3 10k ( /4FDF534E R1 R3 10k
( 1 N-000039 ) ( 1 N-000018 )
( 2 VCC ) ( 2 VCC )
) )
( /4FE094D5 pin_strip_6 R5 R-SIL_5 ( /4FE094D5 pin_strip_6 R5 R-SIL_5
( 1 VCC ) ( 1 VCC )
( 2 N-000081 ) ( 2 N-000081 )
( 3 N-000130 ) ( 3 N-000133 )
( 4 N-000079 ) ( 4 N-000080 )
( 5 N-000103 ) ( 5 N-000104 )
( 6 N-000080 ) ( 6 N-000082 )
) )
( /4FDF60AB R1 R6 330 ( /4FDF60AB R1 R6 330
( 1 N-000106 ) ( 1 N-000105 )
( 2 GND ) ( 2 GND )
) )
( /4FDF540D SW_6x6 SW1 SW_PUSH ( /4FDF540D SW_6x6 SW1 SW_PUSH
( 1 N-000039 ) ( 1 N-000018 )
( 2 GND ) ( 2 GND )
) )
( /4FE36B44 pin_array_6x2 X1 CONN_5X2 ( /4FE36B44 PIN_ARRAY_5x2 X1 CONN_5X2
( 1 ? ) ( 1 ? )
( 2 N-000052 ) ( 2 N-000048 )
( 3 N-000117 ) ( 3 N-000123 )
( 4 ? ) ( 4 ? )
( 5 GND ) ( 5 GND )
( 6 ? ) ( 6 ? )
@ -408,46 +412,46 @@
( 25 //TE ) ( 25 //TE )
) )
( /4FDF5E6E sd_cocket_yamaichi_fps009_3001 X3 SD-CON ( /4FDF5E6E sd_cocket_yamaichi_fps009_3001 X3 SD-CON
( 1 N-000082 ) ( 1 N-000085 )
( 2 N-000105 ) ( 2 N-000108 )
( 3 GND ) ( 3 GND )
( 4 +3.3V ) ( 4 +3.3V )
( 5 N-000084 ) ( 5 N-000087 )
( 6 GND ) ( 6 GND )
( 7 N-000115 ) ( 7 N-000122 )
( 8 ? ) ( 8 ? )
( 9 ? ) ( 9 ? )
) )
( /4FDF685B PIN_ARRAY_20X2 X4 PATA ( /4FDF685B PIN_ARRAY_20X2 X4 PATA
( 1 N-000039 ) ( 1 N-000018 )
( 2 GND ) ( 2 GND )
( 3 /PA7 ) ( 3 /PA7 )
( 4 N-000111 ) ( 4 N-000113 )
( 5 /PA6 ) ( 5 /PA6 )
( 6 N-000133 ) ( 6 N-000131 )
( 7 /PA5 ) ( 7 /PA5 )
( 8 N-000109 ) ( 8 N-000114 )
( 9 /PA4 ) ( 9 /PA4 )
( 10 N-000114 ) ( 10 N-000116 )
( 11 /PA3 ) ( 11 /PA3 )
( 12 N-000112 ) ( 12 N-000111 )
( 13 /PA2 ) ( 13 /PA2 )
( 14 N-000131 ) ( 14 N-000002 )
( 15 /PA1 ) ( 15 /PA1 )
( 16 N-000113 ) ( 16 N-000115 )
( 17 /PA0 ) ( 17 /PA0 )
( 18 N-000132 ) ( 18 N-000130 )
( 19 GND ) ( 19 GND )
( 20 ? ) ( 20 ? )
( 21 ? ) ( 21 ? )
( 22 GND ) ( 22 GND )
( 23 N-000108 ) ( 23 N-000110 )
( 24 GND ) ( 24 GND )
( 25 N-000134 ) ( 25 N-000135 )
( 26 GND ) ( 26 GND )
( 27 ? ) ( 27 ? )
( 28 ? ) ( 28 ? )
( 29 N-000039 ) ( 29 N-000018 )
( 30 GND ) ( 30 GND )
( 31 ? ) ( 31 ? )
( 32 ? ) ( 32 ? )
@ -477,7 +481,7 @@
( 3 GND ) ( 3 GND )
( 4 +12V ) ( 4 +12V )
) )
( /4FE091E5 PIN_ARRAY_4x1 X7 HDD_POWER ( /4FE091E5 HDD_POWER X7 HDD_POWER
( 1 VCC ) ( 1 VCC )
( 2 GND ) ( 2 GND )
( 3 GND ) ( 3 GND )
@ -501,7 +505,7 @@
( B2 //ASTB ) ( B2 //ASTB )
( B3 /STATUS1 ) ( B3 /STATUS1 )
( B4 /D5 ) ( B4 /D5 )
( B5 N-000126 ) ( B5 N-000038 )
( B6 //TE ) ( B6 //TE )
( B7 /D6 ) ( B7 /D6 )
( B8 /D7 ) ( B8 /D7 )
@ -512,11 +516,11 @@
( B13 ? ) ( B13 ? )
) )
( /4FE5DEFA pin_array_3x2 X9 ISP ( /4FE5DEFA pin_array_3x2 X9 ISP
( 1 N-000116 ) ( 1 N-000122 )
( 2 VCC ) ( 2 VCC )
( 3 N-000104 ) ( 3 N-000106 )
( 4 N-000115 ) ( 4 N-000118 )
( 5 N-000039 ) ( 5 N-000018 )
( 6 GND ) ( 6 GND )
) )
) )

View File

@ -1,4 +1,4 @@
update=21/06/2012 21:10:25 update=29/06/2012 18:02:54
version=1 version=1
last_client=eeschema last_client=eeschema
[general] [general]
@ -101,3 +101,4 @@ LibName28=opto
LibName29=atmel LibName29=atmel
LibName30=contrib LibName30=contrib
LibName31=valves LibName31=valves
LibName32=w_device

View File

@ -20,7 +20,7 @@
<OverrideVtor>false</OverrideVtor> <OverrideVtor>false</OverrideVtor>
<OverrideVtorValue /> <OverrideVtorValue />
<eraseonlaunchrule>0</eraseonlaunchrule> <eraseonlaunchrule>0</eraseonlaunchrule>
<AsfVersion>3.1.3</AsfVersion> <AsfVersion>2.11.1</AsfVersion>
</PropertyGroup> </PropertyGroup>
<PropertyGroup Condition=" '$(Configuration)' == 'Release' "> <PropertyGroup Condition=" '$(Configuration)' == 'Release' ">
<ToolchainSettings> <ToolchainSettings>
@ -48,6 +48,7 @@
<avrgcc.common.outputfiles.hex>True</avrgcc.common.outputfiles.hex> <avrgcc.common.outputfiles.hex>True</avrgcc.common.outputfiles.hex>
<avrgcc.common.outputfiles.lss>True</avrgcc.common.outputfiles.lss> <avrgcc.common.outputfiles.lss>True</avrgcc.common.outputfiles.lss>
<avrgcc.common.outputfiles.eep>True</avrgcc.common.outputfiles.eep> <avrgcc.common.outputfiles.eep>True</avrgcc.common.outputfiles.eep>
<avrgcc.common.outputfiles.srec>True</avrgcc.common.outputfiles.srec>
<avrgcc.compiler.general.ChangeDefaultCharTypeUnsigned>True</avrgcc.compiler.general.ChangeDefaultCharTypeUnsigned> <avrgcc.compiler.general.ChangeDefaultCharTypeUnsigned>True</avrgcc.compiler.general.ChangeDefaultCharTypeUnsigned>
<avrgcc.compiler.general.ChangeDefaultBitFieldUnsigned>True</avrgcc.compiler.general.ChangeDefaultBitFieldUnsigned> <avrgcc.compiler.general.ChangeDefaultBitFieldUnsigned>True</avrgcc.compiler.general.ChangeDefaultBitFieldUnsigned>
<avrgcc.compiler.optimization.level>Optimize (-O1)</avrgcc.compiler.optimization.level> <avrgcc.compiler.optimization.level>Optimize (-O1)</avrgcc.compiler.optimization.level>

View File

@ -1,5 +1,5 @@
/*- /*-
* Copyright (c) 2012 Oliver Lehmann * Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
@ -26,7 +26,7 @@
*/ */
/* /*
* $Id: wdc_avr.c,v 1.4 2012/06/20 18:58:24 olivleh1 Exp $ * $Id: wdc_avr.c,v 1.5 2013/04/20 23:22:47 olivleh1 Exp $
*/ */
@ -61,6 +61,7 @@ void wdc_init_avr()
configure_pin_miso(); configure_pin_miso();
configure_pin_sck(); configure_pin_sck();
configure_pin_mosi(); configure_pin_mosi();
configure_pin_mmc_cs();
/* configure the ATA interface */ /* configure the ATA interface */
configure_ata_wr(); configure_ata_wr();

View File

@ -1,5 +1,5 @@
/*- /*-
* Copyright (c) 2012 Oliver Lehmann * Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
@ -26,7 +26,7 @@
*/ */
/* /*
* $Id: wdc_avr.h,v 1.4 2012/06/20 18:58:24 olivleh1 Exp $ * $Id: wdc_avr.h,v 1.5 2013/04/20 23:22:47 olivleh1 Exp $
*/ */
@ -61,8 +61,6 @@
#define disable_rdwrtoata() PORT_ADRDEC &= ~( 1 << PIN_ADRDEC_ADDR1 ) #define disable_rdwrtoata() PORT_ADRDEC &= ~( 1 << PIN_ADRDEC_ADDR1 )
#define enable_atalatch() PORT_ADRDEC |= ( ( 1 << PIN_ADRDEC_ADDR0 ) | ( 1 << PIN_ADRDEC_ADDR1 )) #define enable_atalatch() PORT_ADRDEC |= ( ( 1 << PIN_ADRDEC_ADDR0 ) | ( 1 << PIN_ADRDEC_ADDR1 ))
#define disable_atalatch() PORT_ADRDEC &= ~( ( 1 << PIN_ADRDEC_ADDR0 ) | ( 1 << PIN_ADRDEC_ADDR1 )) #define disable_atalatch() PORT_ADRDEC &= ~( ( 1 << PIN_ADRDEC_ADDR0 ) | ( 1 << PIN_ADRDEC_ADDR1 ))
#define enable_mmc() PORT_ADRDEC |= ( 1 << PIN_ADRDEC_ADDR2 );
#define disable_mmc() PORT_ADRDEC &= ~( 1 << PIN_ADRDEC_ADDR2 );
#define enable_sysconf() PORT_ADRDEC |= ( ( 1 << PIN_ADRDEC_ADDR0 ) | ( 1 << PIN_ADRDEC_ADDR1 ) | ( 1 << PIN_ADRDEC_ADDR2 ) ) #define enable_sysconf() PORT_ADRDEC |= ( ( 1 << PIN_ADRDEC_ADDR0 ) | ( 1 << PIN_ADRDEC_ADDR1 ) | ( 1 << PIN_ADRDEC_ADDR2 ) )
#define disable_sysconf() PORT_ADRDEC &= ~( ( 1 << PIN_ADRDEC_ADDR0 ) | ( 1 << PIN_ADRDEC_ADDR1 ) | ( 1 << PIN_ADRDEC_ADDR2 ) ) #define disable_sysconf() PORT_ADRDEC &= ~( ( 1 << PIN_ADRDEC_ADDR0 ) | ( 1 << PIN_ADRDEC_ADDR1 ) | ( 1 << PIN_ADRDEC_ADDR2 ) )
@ -70,6 +68,10 @@
#define configure_pin_miso() DDR_MMC &= ~ ( 1 << PIN_MMC_MISO ) #define configure_pin_miso() DDR_MMC &= ~ ( 1 << PIN_MMC_MISO )
#define configure_pin_sck() DDR_MMC |= ( 1 << PIN_MMC_SCK ) #define configure_pin_sck() DDR_MMC |= ( 1 << PIN_MMC_SCK )
#define configure_pin_mosi() DDR_MMC |= ( 1 << PIN_MMC_MOSI ) #define configure_pin_mosi() DDR_MMC |= ( 1 << PIN_MMC_MOSI )
#define configure_pin_mmc_cs() DDR_MMC |= ( 1 << PIN_MMC_CS )
#define disable_mmc() PORT_MMC |= (1<<PIN_MMC_CS);
#define enable_mmc() PORT_MMC &=~(1<<PIN_MMC_CS);
/* functions dealing with the sysconf jumperpad */ /* functions dealing with the sysconf jumperpad */
#define jumper_pata_set() ~port_data_get() & (1<<PIN_DATA_D0) #define jumper_pata_set() ~port_data_get() & (1<<PIN_DATA_D0)

View File

@ -1,5 +1,5 @@
/*- /*-
* Copyright (c) 2012 Oliver Lehmann * Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
@ -26,7 +26,7 @@
*/ */
/* /*
* $Id: wdc_config.h,v 1.20 2012/06/20 18:58:24 olivleh1 Exp $ * $Id: wdc_config.h,v 1.21 2013/04/20 23:22:47 olivleh1 Exp $
*/ */
@ -80,6 +80,7 @@
#define PIN_MMC PINB #define PIN_MMC PINB
#define DDR_MMC DDRB #define DDR_MMC DDRB
#define PIN_MMC_CS PINB4 /* AVR Port where the MMC Card /CS signal is connected to */
#define PIN_MMC_MOSI PINB5 /* AVR Port: MOSI / MMC Card: Data-In */ #define PIN_MMC_MOSI PINB5 /* AVR Port: MOSI / MMC Card: Data-In */
#define PIN_MMC_MISO PINB6 /* AVR Port: MISO / MMC Card: Data-Out */ #define PIN_MMC_MISO PINB6 /* AVR Port: MISO / MMC Card: Data-Out */
#define PIN_MMC_SCK PINB7 /* AVR Port: SCk / MMC Card: CLK */ #define PIN_MMC_SCK PINB7 /* AVR Port: SCk / MMC Card: CLK */

View File

@ -1,5 +1,5 @@
/*- /*-
* Copyright (c) 2012 Oliver Lehmann * Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
@ -26,7 +26,7 @@
*/ */
/* /*
* $Id: wdc_drv_mmc.c,v 1.21 2012/06/20 18:58:24 olivleh1 Exp $ * $Id: wdc_drv_mmc.c,v 1.22 2013/04/20 23:22:47 olivleh1 Exp $
*/ */
#include <avr/io.h> #include <avr/io.h>
@ -591,7 +591,7 @@ uint8_t mmc_read_multiblock ( uint32_t addr, uint8_t *buffer, uint8_t numblocks
send_dummy_byte(); send_dummy_byte();
#endif #endif
disable_mmc() disable_mmc();
return ( 0 ); return ( 0 );
} }

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@ -1,5 +1,5 @@
/*- /*-
* Copyright (c) 2012 Oliver Lehmann * Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
@ -26,7 +26,7 @@
*/ */
/* /*
* $Id: wdc_drv_mmc.h,v 1.8 2012/06/12 17:34:14 olivleh1 Exp $ * $Id: wdc_drv_mmc.h,v 1.9 2013/04/20 23:22:47 olivleh1 Exp $
*/ */
#ifndef WDC_DRV_MMC_H_ #ifndef WDC_DRV_MMC_H_

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@ -1,5 +1,5 @@
/*- /*-
* Copyright (c) 2012 Oliver Lehmann * Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
@ -26,7 +26,7 @@
*/ */
/* /*
* $Id: wdc_drv_pata.c,v 1.10 2012/06/17 16:40:42 olivleh1 Exp $ * $Id: wdc_drv_pata.c,v 1.11 2013/04/20 23:22:47 olivleh1 Exp $
*/ */
#include "wdc_config.h" #include "wdc_config.h"

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@ -1,5 +1,5 @@
/*- /*-
* Copyright (c) 2012 Oliver Lehmann * Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
@ -26,7 +26,7 @@
*/ */
/* /*
* $Id: wdc_drv_pata.h,v 1.7 2012/06/17 13:21:55 olivleh1 Exp $ * $Id: wdc_drv_pata.h,v 1.8 2013/04/20 23:22:47 olivleh1 Exp $
*/ */
#ifndef WDC_DRV_PATA_H_ #ifndef WDC_DRV_PATA_H_

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@ -1,5 +1,5 @@
/*- /*-
* Copyright (c) 2012 Oliver Lehmann * Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
@ -26,7 +26,7 @@
*/ */
/* /*
* $Id: wdc_if_disk.c,v 1.13 2012/06/13 20:17:45 olivleh1 Exp $ * $Id: wdc_if_disk.c,v 1.14 2013/04/20 23:22:47 olivleh1 Exp $
*/ */
#include <stdint.h> #include <stdint.h>

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@ -1,5 +1,5 @@
/*- /*-
* Copyright (c) 2012 Oliver Lehmann * Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
@ -26,7 +26,7 @@
*/ */
/* /*
* $Id: wdc_if_disk.h,v 1.8 2012/06/13 20:17:45 olivleh1 Exp $ * $Id: wdc_if_disk.h,v 1.9 2013/04/20 23:22:47 olivleh1 Exp $
*/ */
#ifndef WDC_IF_DISK_H_ #ifndef WDC_IF_DISK_H_

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@ -1,5 +1,5 @@
/*- /*-
* Copyright (c) 2012 Oliver Lehmann * Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
@ -26,7 +26,7 @@
*/ */
/* /*
* $Id: wdc_if_disk_perf.c,v 1.10 2012/06/20 18:58:24 olivleh1 Exp $ * $Id: wdc_if_disk_perf.c,v 1.11 2013/04/20 23:22:47 olivleh1 Exp $
*/ */
#include <avr/io.h> #include <avr/io.h>

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@ -1,5 +1,5 @@
/*- /*-
* Copyright (c) 2012 Oliver Lehmann * Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
@ -26,7 +26,7 @@
*/ */
/* /*
* $Id: wdc_if_p8000.c,v 1.11 2012/06/13 20:17:45 olivleh1 Exp $ * $Id: wdc_if_p8000.c,v 1.12 2013/04/20 23:22:47 olivleh1 Exp $
*/ */
#include "wdc_config.h" #include "wdc_config.h"

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@ -1,5 +1,5 @@
/*- /*-
* Copyright (c) 2012 Oliver Lehmann * Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
@ -26,7 +26,7 @@
*/ */
/* /*
* $Id: wdc_if_p8000.h,v 1.11 2012/06/24 09:10:40 olivleh1 Exp $ * $Id: wdc_if_p8000.h,v 1.12 2013/04/20 23:22:47 olivleh1 Exp $
*/ */
#ifndef WDC_IF_P8000_H_ #ifndef WDC_IF_P8000_H_

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@ -1,5 +1,5 @@
/*- /*-
* Copyright (c) 2012 Oliver Lehmann * Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
@ -29,7 +29,7 @@
/* /*
* P8000 WDC Emulator * P8000 WDC Emulator
* *
* $Id: wdc_main.c,v 1.30 2012/06/20 18:58:24 olivleh1 Exp $ * $Id: wdc_main.c,v 1.31 2013/04/20 23:22:47 olivleh1 Exp $
* *
* TODO: - right now, BTT entries are not taken into account * TODO: - right now, BTT entries are not taken into account
*/ */
@ -78,7 +78,7 @@ main ( void )
#endif #endif
atmega_setup(); atmega_setup();
uart_puts_p ( PSTR ( "P8000 WDC Emulator 0.90\n" ) ); uart_puts_p ( PSTR ( "P8000 WDC Emulator 0.91\n" ) );
#ifdef MEASURE_DISK_PERFORMANCE #ifdef MEASURE_DISK_PERFORMANCE
measure_performance(); measure_performance();

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@ -1,5 +1,5 @@
/*- /*-
* Copyright (c) 2012 Oliver Lehmann * Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
@ -26,7 +26,7 @@
*/ */
/* /*
* $Id: wdc_main.h,v 1.12 2012/06/09 19:47:31 olivleh1 Exp $ * $Id: wdc_main.h,v 1.13 2013/04/20 23:22:47 olivleh1 Exp $
*/ */

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@ -1,5 +1,5 @@
/*- /*-
* Copyright (c) 2012 Oliver Lehmann * Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
@ -26,7 +26,7 @@
*/ */
/* /*
* $Id: wdc_par.c,v 1.6 2012/06/17 13:21:55 olivleh1 Exp $ * $Id: wdc_par.c,v 1.7 2013/04/20 23:22:47 olivleh1 Exp $
*/ */
#include <avr/pgmspace.h> #include <avr/pgmspace.h>

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@ -1,5 +1,5 @@
/*- /*-
* Copyright (c) 2012 Oliver Lehmann * Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
@ -26,7 +26,7 @@
*/ */
/* /*
* $Id: wdc_par.h,v 1.4 2012/06/09 19:47:31 olivleh1 Exp $ * $Id: wdc_par.h,v 1.5 2013/04/20 23:22:47 olivleh1 Exp $
*/ */
#ifndef WDC_PAR_H_ #ifndef WDC_PAR_H_

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@ -1,5 +1,5 @@
/*- /*-
* Copyright (c) 2012 Oliver Lehmann * Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
@ -26,7 +26,7 @@
*/ */
/* /*
* $Id: wdc_ram.c,v 1.5 2012/06/07 18:01:02 olivleh1 Exp $ * $Id: wdc_ram.c,v 1.6 2013/04/20 23:22:47 olivleh1 Exp $
*/ */
#include <avr/pgmspace.h> #include <avr/pgmspace.h>

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@ -1,5 +1,5 @@
/*- /*-
* Copyright (c) 2012 Oliver Lehmann * Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
@ -26,7 +26,7 @@
*/ */
/* /*
* $Id: wdc_ram.h,v 1.5 2012/06/07 18:01:02 olivleh1 Exp $ * $Id: wdc_ram.h,v 1.6 2013/04/20 23:22:47 olivleh1 Exp $
*/ */
#ifndef WDC_RAM_H_ #ifndef WDC_RAM_H_