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This commit is contained in:
Oliver Lehmann 2012-06-22 14:29:06 +00:00
parent af6f2f4acd
commit f0026a5cf7
7 changed files with 3031 additions and 1490 deletions
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2720
P8000_WDC_Emulator/P8000_WDC_Emulator/Hardware/P8000_WDC_Emulator.brd
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4
P8000_WDC_Emulator/P8000_WDC_Emulator/Hardware/P8000_WDC_Emulator.cmp
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@ -1,4 +1,4 @@
Cmp-Mod V01 Created by CvPcb (2012-01-19 BZR 3256)-stable date = 21/06/2012 22:07:51 Cmp-Mod V01 Genere par PcbNew le 22/06/2012 14:56:30
BeginCmp BeginCmp
TimeStamp = /4FDF8116; TimeStamp = /4FDF8116;
@ -361,7 +361,7 @@ BeginCmp
TimeStamp = /4FE2B9E3; TimeStamp = /4FE2B9E3;
Reference = X5; Reference = X5;
ValeurCmp = MINI_DIN_6; ValeurCmp = MINI_DIN_6;
IdModule = MINI_DIN6; IdModule = mini_din-M_DIN6;
EndCmp EndCmp
BeginCmp BeginCmp

7
P8000_WDC_Emulator/P8000_WDC_Emulator/Hardware/P8000_WDC_Emulator.dcm
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@ -1,4 +1,4 @@
EESchema-DOCLIB Version 2.0 Date: 21/06/2012 21:09:16 EESchema-DOCLIB Version 2.0 Date: 22/06/2012 15:38:09
# #
$CMP LM317 $CMP LM317
D Linear Regulator (adjustable) D Linear Regulator (adjustable)
@ -6,4 +6,9 @@ K POWER REGUL
F regulator/lm117.pdf F regulator/lm117.pdf
$ENDCMP $ENDCMP
# #
$CMP R_PACK4
D 4 resistors Pack
K R DEV
$ENDCMP
#
#End Doc Library #End Doc Library

24
P8000_WDC_Emulator/P8000_WDC_Emulator/Hardware/P8000_WDC_Emulator.lib
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@ -1,4 +1,4 @@
EESchema-LIBRARY Version 2.3 Date: 21/06/2012 21:09:16 EESchema-LIBRARY Version 2.3 Date: 22/06/2012 15:38:09
#encoding utf-8 #encoding utf-8
# #
# 4_Pin_Molex # 4_Pin_Molex
@ -231,6 +231,28 @@ X ~ 6 -300 -250 120 R 50 50 1 1 I
ENDDRAW ENDDRAW
ENDDEF ENDDEF
# #
# R_PACK4
#
DEF R_PACK4 RP 0 20 Y N 1 F N
F0 "RP" 0 450 40 H V C CNN
F1 "R_PACK4" 0 -50 40 H V C CNN
DRAW
P 5 0 1 0 -100 400 -100 0 100 0 100 400 -100 400 N
P 7 0 1 0 -100 50 -80 70 -40 30 0 70 40 30 80 70 100 50 N
P 7 0 1 0 -100 150 -80 170 -40 130 0 170 40 130 80 170 100 150 N
P 7 0 1 0 -100 250 -80 270 -40 230 0 270 40 230 80 270 100 250 N
P 7 0 1 0 -100 350 -80 370 -40 330 0 370 40 330 80 370 100 350 N
X P1 1 -200 350 100 R 40 40 1 1 P
X R1 2 200 350 100 L 40 40 1 1 P
X P2 3 -200 250 100 R 40 40 1 1 P
X R2 4 200 250 100 L 40 40 1 1 P
X P3 5 -200 150 100 R 40 40 1 1 P
X R3 6 200 150 100 L 40 40 1 1 P
X P4 7 -200 50 100 R 40 40 1 1 P
X R4 8 200 50 100 L 40 40 1 1 P
ENDDRAW
ENDDEF
#
# SD-CON # SD-CON
# #
DEF SD-CON J 0 40 Y Y 1 F N DEF SD-CON J 0 40 Y Y 1 F N

199
P8000_WDC_Emulator/P8000_WDC_Emulator/Hardware/P8000_WDC_Emulator.mod
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@ -1,4 +1,4 @@
PCBNEW-LibModule-V1 21/06/2012 16:24:35 PCBNEW-LibModule-V1 22/06/2012 15:00:57
# encoding utf-8 # encoding utf-8
$INDEX $INDEX
4PIN_MOLEX 4PIN_MOLEX
@ -11,99 +11,6 @@ pin_strip_6
pin_strip_8 pin_strip_8
sd_socket sd_socket
$EndINDEX $EndINDEX
$MODULE mini_din-M_DIN6
Po 0 0 0 15 00200000 00000000 ~~
Li mini_din-M_DIN6
Cd
Kw
Sc 00000000
Op 0 0 0
At VIRTUAL
DS 2755 -1870 -2755 -1870 50 21
DS -2755 -1870 -2755 -98 50 21
DS -2755 -98 -2755 3169 50 21
DS -2755 3169 2755 3149 50 21
DS 2755 3149 2755 688 50 21
DS 2755 688 2755 -98 50 21
DS 2755 -98 2755 -1870 50 21
DS 2755 -98 2637 -98 50 21
DS 2637 -98 2637 688 50 21
DS 2637 688 2755 688 50 21
DS -2755 -98 -2637 -98 50 21
DS -2637 -98 -2637 688 50 21
DS -2637 688 -2736 688 50 21
T0 -740 1820 320 320 0 35 N V "1"
T1 196 1820 320 320 0 35 N V "2"
T2 -1643 1820 320 320 0 35 N V "3"
T3 1057 1836 320 320 0 35 N V "5"
T4 -1673 2804 320 320 0 35 N V "6"
T5 991 2820 320 320 0 35 N V "8"
T6 -750 -2369 700 700 0 35 N V ">NAME"
T7 -400 -1369 700 700 0 35 N V ">VALUE"
$PAD
Sh "1" C 560 1120 0 0 0
Dr 354 0 0
At STD N 00A88001
Ne 0 ""
Po -511 1476
$EndPAD
$PAD
Sh "2" C 560 1120 0 0 0
Dr 354 0 0
At STD N 00A88001
Ne 0 ""
Po 511 1476
$EndPAD
$PAD
Sh "3" C 560 1120 0 0 0
Dr 354 0 0
At STD N 00A88001
Ne 0 ""
Po -1338 1476
$EndPAD
$PAD
Sh "5" C 560 1120 0 0 0
Dr 354 0 0
At STD N 00A88001
Ne 0 ""
Po 1338 1476
$EndPAD
$PAD
Sh "6" C 560 1120 0 0 0
Dr 354 0 0
At STD N 00A88001
Ne 0 ""
Po -1338 2440
$EndPAD
$PAD
Sh "8" C 560 1120 0 0 0
Dr 354 0 0
At STD N 00A88001
Ne 0 ""
Po 1338 2460
$EndPAD
$PAD
Sh "SH1" C 1377 1377 0 0 0
Dr 905 0 0
At STD N 00A88001
Ne 0 ""
Po 2677 295
$EndPAD
$PAD
Sh "SH2" C 1377 1377 0 0 0
Dr 905 0 0
At STD N 00A88001
Ne 0 ""
Po 0 -19
$EndPAD
$PAD
Sh "SH3" C 1377 1377 0 0 0
Dr 905 0 0
At STD N 00A88001
Ne 0 ""
Po -2657 295
$EndPAD
$EndMODULE M_DIN6
$MODULE MINI_DIN6 $MODULE MINI_DIN6
Po 0 0 0 15 00200000 00000000 ~~ Po 0 0 0 15 00200000 00000000 ~~
Li MINI_DIN6 Li MINI_DIN6
@ -784,17 +691,17 @@ Ro 0.000000 0.000000 0.000000
$EndSHAPE3D $EndSHAPE3D
$EndMODULE pin_strip_6 $EndMODULE pin_strip_6
$MODULE 4PIN_MOLEX $MODULE 4PIN_MOLEX
Po 0 0 0 15 4FE32E8F 00000000 ~~ Po 0 0 0 15 4FE46B17 00000000 ~~
Li 4PIN_MOLEX Li 4PIN_MOLEX
Sc 00000000 Sc 00000000
AR AR 4PIN_MOLEX
Op 0 0 0 Op 0 0 0
T0 8000 -3000 600 600 0 120 N V 21 N "4PIN_MOLEX" T0 0 -1600 600 600 0 120 N V 21 N "4PIN_MOLEX"
T1 6500 2500 600 600 0 120 N V 21 N "VAL**" T1 50 -3550 600 600 0 120 N V 21 N "VAL**"
DS -4550 -600 -4550 -5150 150 21
DS 4550 -600 4550 -5150 150 21
DS 4550 -600 -4550 -600 150 21 DS 4550 -600 -4550 -600 150 21
DS -4550 -600 -4550 -5400 150 21 DS -4550 -5150 4550 -5150 150 21
DS -4550 -5400 4550 -5400 150 21
DS 4550 -5400 4550 -600 150 21
$PAD $PAD
Sh "3" C 787 787 0 0 0 Sh "3" C 787 787 0 0 0
Dr 354 0 0 Dr 354 0 0
@ -842,14 +749,100 @@ Sh "" O 1181 906 0 0 0
Dr 1181 0 0 O 1181 906 Dr 1181 0 0 O 1181 906
At HOLE N 00E0FFFF At HOLE N 00E0FFFF
Ne 0 "" Ne 0 ""
Po 2000 -4350 Po 2000 -4550
$EndPAD $EndPAD
$PAD $PAD
Sh "" O 1181 906 0 0 0 Sh "" O 1181 906 0 0 0
Dr 1181 0 0 O 1181 906 Dr 1181 0 0 O 1181 906
At HOLE N 00E0FFFF At HOLE N 00E0FFFF
Ne 0 "" Ne 0 ""
Po -2000 -4350 Po -2000 -4550
$EndPAD $EndPAD
$EndMODULE 4PIN_MOLEX $EndMODULE 4PIN_MOLEX
$MODULE mini_din-M_DIN6
Po 0 0 0 15 4FE46C70 00000000 ~~
Li mini_din-M_DIN6
Sc 00000000
AR mini_din-M_DIN6
Op 0 0 0
At VIRTUAL
T0 0 2600 320 320 0 35 N V 21 N "VAL**"
T1 0 -1450 320 320 0 35 N V 21 N "MINI_DIN_6"
DS 2755 -1870 -2755 -1870 50 21
DS -2755 -1870 -2755 -98 50 21
DS -2755 -98 -2755 3169 50 21
DS -2755 3169 2755 3149 50 21
DS 2755 3149 2755 688 50 21
DS 2755 688 2755 -98 50 21
DS 2755 -98 2755 -1870 50 21
DS 2755 -98 2637 -98 50 21
DS 2637 -98 2637 688 50 21
DS 2637 688 2755 688 50 21
DS -2755 -98 -2637 -98 50 21
DS -2637 -98 -2637 688 50 21
DS -2637 688 -2736 688 50 21
$PAD
Sh "1" C 560 1120 0 0 0
Dr 354 0 0
At STD N 00A88001
Ne 0 ""
Po -511 1476
$EndPAD
$PAD
Sh "2" C 560 1120 0 0 0
Dr 354 0 0
At STD N 00A88001
Ne 0 ""
Po 511 1476
$EndPAD
$PAD
Sh "3" C 560 1120 0 0 0
Dr 354 0 0
At STD N 00A88001
Ne 0 ""
Po -1338 1476
$EndPAD
$PAD
Sh "5" C 560 1120 0 0 0
Dr 354 0 0
At STD N 00A88001
Ne 0 ""
Po 1338 1476
$EndPAD
$PAD
Sh "6" C 560 1120 0 0 0
Dr 354 0 0
At STD N 00A88001
Ne 0 ""
Po -1338 2440
$EndPAD
$PAD
Sh "8" C 560 1120 0 0 0
Dr 354 0 0
At STD N 00A88001
Ne 0 ""
Po 1338 2460
$EndPAD
$PAD
Sh "SH1" C 1377 1377 0 0 0
Dr 905 0 0
At STD N 00A88001
Ne 0 ""
Po 2677 295
$EndPAD
$PAD
Sh "SH2" C 1377 1377 0 0 0
Dr 905 0 0
At STD N 00A88001
Ne 0 ""
Po 0 -19
$EndPAD
$PAD
Sh "SH3" C 1377 1377 0 0 0
Dr 905 0 0
At STD N 00A88001
Ne 0 ""
Po -2657 295
$EndPAD
$EndMODULE mini_din-M_DIN6
$EndLIBRARY $EndLIBRARY

1545
P8000_WDC_Emulator/P8000_WDC_Emulator/Hardware/P8000_WDC_Emulator.net
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28
P8000_WDC_Emulator/P8000_WDC_Emulator/Hardware/P8000_WDC_Emulator.sch
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date 21/06/2012 21:10:36 EESchema Schematic File Version 2 date 22/06/2012 16:15:27
LIBS:P8000_WDC_Emulator LIBS:P8000_WDC_Emulator
LIBS:power LIBS:power
LIBS:device LIBS:device
@ -37,8 +37,8 @@ $Descr A2 23400 16535
encoding utf-8 encoding utf-8
Sheet 1 1 Sheet 1 1
Title "P8000 WDC Emulator" Title "P8000 WDC Emulator"
Date "21 jun 2012" Date "22 jun 2012"
Rev "$Revision: 1.22 $" Rev "$Revision: 1.23 $"
Comp "" Comp ""
Comment1 "" Comment1 ""
Comment2 "" Comment2 ""
@ -162,7 +162,7 @@ Wire Wire Line
Wire Wire Line Wire Wire Line
2400 4550 2100 4550 2400 4550 2100 4550
Wire Wire Line Wire Wire Line
8350 8750 8950 8750 8950 9250 8050 9250
Wire Wire Line Wire Wire Line
21300 6000 20800 6000 21300 6000 20800 6000
Wire Wire Line Wire Wire Line
@ -696,8 +696,6 @@ Wire Wire Line
6400 7950 10100 7950 6400 7950 10100 7950
Wire Wire Line Wire Wire Line
10100 7500 9700 7500 10100 7500 9700 7500
Wire Wire Line
8350 9250 8050 9250
Wire Wire Line Wire Wire Line
8050 9450 8350 9450 8050 9450 8350 9450
Connection ~ 8350 9350 Connection ~ 8350 9350
@ -728,7 +726,7 @@ Wire Wire Line
Wire Wire Line Wire Wire Line
8750 9550 8750 9150 8750 9550 8750 9150
Wire Wire Line Wire Wire Line
8350 8750 8350 9550 8350 9250 8350 9550
Wire Bus Line Wire Bus Line
7900 3750 7900 8150 7900 3750 7900 8150
Wire Wire Line Wire Wire Line
@ -1309,10 +1307,10 @@ $EndComp
$Comp $Comp
L R-SIL_5 R5 L R-SIL_5 R5
U 1 1 4FE094D5 U 1 1 4FE094D5
P 9250 8900 P 9250 9000
F 0 "R5" H 9250 9200 50 0000 C CNN F 0 "R5" H 9250 9300 50 0000 C CNN
F 1 "R-SIL_5" H 9235 9120 50 0000 C CNN F 1 "R-SIL_5" H 9235 9220 50 0000 C CNN
1 9250 8900 1 9250 9000
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
@ -2089,11 +2087,11 @@ F 1 "74HCT573" H 16700 8750 60 0000 C CNN
$EndComp $EndComp
$Comp $Comp
L 74HCT04 D8 L 74HCT04 D8
U 4 1 4FDF6517 U 6 1 4FDF6517
P 13500 10800 P 13500 10800
F 0 "D8" H 13650 10900 40 0000 C CNN F 0 "D8" H 13650 10900 40 0000 C CNN
F 1 "74HCT04" H 13700 10700 40 0000 C CNN F 1 "74HCT04" H 13700 10700 40 0000 C CNN
4 13500 10800 6 13500 10800
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
@ -2568,11 +2566,11 @@ F 1 "74HCT04" H 5650 2850 40 0000 C CNN
$EndComp $EndComp
$Comp $Comp
L 74HCT04 D8 L 74HCT04 D8
U 3 1 4FDE2FFE U 4 1 4FDE2FFE
P 6150 7300 P 6150 7300
F 0 "D8" H 6300 7400 40 0000 C CNN F 0 "D8" H 6300 7400 40 0000 C CNN
F 1 "74HCT04" H 6350 7200 40 0000 C CNN F 1 "74HCT04" H 6350 7200 40 0000 C CNN
3 6150 7300 4 6150 7300
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp