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This commit is contained in:
Oliver Lehmann 2012-05-29 20:23:09 +00:00
parent 878649dbdb
commit d7771de55e
3 changed files with 99 additions and 96 deletions

View File

@ -1,7 +1,7 @@
/*
* P8000 WDC Emulator
*
* $Id: wdc_config.h,v 1.1 2012/05/29 20:13:00 olivleh1 Exp $
* $Id: wdc_config.h,v 1.2 2012/05/29 20:23:09 olivleh1 Exp $
*
*/
@ -9,21 +9,21 @@
#ifndef CONFIG_H_
#define CONFIG_H_
#define PORT_DATA PORTA
#define PIN_DATA PINA
#define DDR_DATA DDRA
#define PORT_DATA PORTA
#define PIN_DATA PINA
#define DDR_DATA DDRA
#define PORT_INFO PORTC
#define PIN_INFO PINC
#define DDR_INFO DDRC
#define PORT_INFO PORTC
#define PIN_INFO PINC
#define DDR_INFO DDRC
#define PIN_INFO_STATUS0 PINC0
#define PIN_INFO_STATUS1 PINC1
#define PIN_INFO_STATUS2 PINC2
#define PIN_INFO_ASTB PINC3
#define PIN_INFO_TE PINC4
#define PIN_INFO_WDARDY PINC5
#define PIN_INFO_TR PINC6
#define PIN_INFO_RST PINC7
#define PIN_INFO_STATUS0 PINC0
#define PIN_INFO_STATUS1 PINC1
#define PIN_INFO_STATUS2 PINC2
#define PIN_INFO_ASTB PINC3
#define PIN_INFO_TE PINC4
#define PIN_INFO_WDARDY PINC5
#define PIN_INFO_TR PINC6
#define PIN_INFO_RST PINC7
#endif /* CONFIG_H_ */

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@ -1,7 +1,7 @@
/*
* P8000 WDC Emulator
*
* $Id: wdc_main.c,v 1.1 2012/05/29 20:13:00 olivleh1 Exp $
* $Id: wdc_main.c,v 1.2 2012/05/29 20:23:09 olivleh1 Exp $
*
*/
@ -18,67 +18,67 @@ void atmega_setup(void);
int main(void)
{
uint8_t cmdbuffer[9];
uint8_t cmdcnt;
uint8_t cmdbuffer[9];
uint8_t cmdcnt;
atmega_setup();
uart_puts_p(PSTR("P8000 WDC Emulator 1.0\n"));
atmega_setup();
uart_puts_p(PSTR("P8000 WDC Emulator 1.0\n"));
while(1)
{
while(1)
{
while( !isset_info_reset() )
{
port_data_set( DATA_CLEAR );
port_info_set( INFO_CLEAR );
}
while( !isset_info_reset() )
{
port_data_set( DATA_CLEAR );
port_info_set( INFO_CLEAR );
}
configure_port_data_read();
cmdcnt = 0;
port_info_set( INFO_STAT_GCMD );
while ( !isset_info_te() );
while ( !isset_info_wdardy() );
while ( cmdcnt < 9 )
{
while ( isset_info_wdardy() );
port_info_set( INFO_ASTB | INFO_STAT_GCMD );
cmdbuffer[cmdcnt] = port_data_get();
port_info_set( INFO_STAT_GCMD );
while ( !isset_info_wdardy() );
cmdcnt++;
}
uart_puts_p(PSTR("CMD Buffer:"));
uart_putc_hex(cmdbuffer[0]);
uart_putc_hex(cmdbuffer[1]);
uart_putc_hex(cmdbuffer[2]);
uart_putc_hex(cmdbuffer[3]);
uart_putc_hex(cmdbuffer[4]);
uart_putc_hex(cmdbuffer[5]);
uart_putc_hex(cmdbuffer[6]);
uart_putc_hex(cmdbuffer[7]);
uart_putc_hex(cmdbuffer[8]);
uart_putc('\n');
}
return 0;
configure_port_data_read();
cmdcnt = 0;
port_info_set( INFO_STAT_GCMD );
while ( !isset_info_te() );
while ( !isset_info_wdardy() );
while ( cmdcnt < 9 )
{
while ( isset_info_wdardy() );
port_info_set( INFO_ASTB | INFO_STAT_GCMD );
cmdbuffer[cmdcnt] = port_data_get();
port_info_set( INFO_STAT_GCMD );
while ( !isset_info_wdardy() );
cmdcnt++;
}
uart_puts_p(PSTR("CMD Buffer:"));
uart_putc_hex(cmdbuffer[0]);
uart_putc_hex(cmdbuffer[1]);
uart_putc_hex(cmdbuffer[2]);
uart_putc_hex(cmdbuffer[3]);
uart_putc_hex(cmdbuffer[4]);
uart_putc_hex(cmdbuffer[5]);
uart_putc_hex(cmdbuffer[6]);
uart_putc_hex(cmdbuffer[7]);
uart_putc_hex(cmdbuffer[8]);
uart_putc('\n');
}
return 0;
}
void atmega_setup(void)
{
set_sleep_mode(SLEEP_MODE_IDLE);
set_sleep_mode(SLEEP_MODE_IDLE);
configure_pin_status0();
configure_pin_status1();
configure_pin_status2();
configure_pin_astb();
configure_pin_te();
configure_pin_wdardy();
configure_pin_tr();
configure_pin_reset();
configure_port_data_read();
uart_init();
configure_pin_status0();
configure_pin_status1();
configure_pin_status2();
configure_pin_astb();
configure_pin_te();
configure_pin_wdardy();
configure_pin_tr();
configure_pin_reset();
configure_port_data_read();
uart_init();
}

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@ -1,7 +1,7 @@
/*
* P8000 WDC Emulator
*
* $Id: wdc_main.h,v 1.1 2012/05/29 20:13:00 olivleh1 Exp $
* $Id: wdc_main.h,v 1.2 2012/05/29 20:23:09 olivleh1 Exp $
*
*/
@ -11,34 +11,37 @@
#include "config.h"
#define isset_info_reset() ((PIN_INFO) & (1 << PIN_INFO_RST))
#define isset_info_te() ((PIN_INFO) & (1 << PIN_INFO_TE))
#define isset_info_wdardy() ((PIN_INFO) & (1 << PIN_INFO_WDARDY))
#define configure_port_data_read() DDR_DATA = 0x00 /* programs the DATA-Port as Input-only for reading from the P8000*/
#define configure_port_data_write() DDR_DATA = 0xff /* programs the DATA-Port as Out-only for writing to the P8000*/
#define configure_port_data_read() DDR_DATA = 0x00 /* programs the DATA-Port as Input-only for reading from the P8000*/
#define configure_port_data_write() DDR_DATA = 0xff /* programs the DATA-Port as Out-only for writing to the P8000*/
#define configure_pin_status0() DDR_INFO |= (1 << PIN_INFO_STATUS0)
#define configure_pin_status1() DDR_INFO |= (1 << PIN_INFO_STATUS1)
#define configure_pin_status2() DDR_INFO |= (1 << PIN_INFO_STATUS2)
#define configure_pin_astb() DDR_INFO |= (1 << PIN_INFO_ASTB)
#define configure_pin_te() DDR_INFO &= ~(1 << PIN_INFO_TE)
#define configure_pin_wdardy() DDR_INFO &= ~(1 << PIN_INFO_WDARDY)
#define configure_pin_tr() DDR_INFO |= (1 << PIN_INFO_TR)
#define configure_pin_reset() DDR_INFO &= ~(1 << PIN_INFO_RST)
#define configure_pin_status0() DDR_INFO |= (1 << PIN_INFO_STATUS0)
#define configure_pin_status1() DDR_INFO |= (1 << PIN_INFO_STATUS1)
#define configure_pin_status2() DDR_INFO |= (1 << PIN_INFO_STATUS2)
#define configure_pin_astb() DDR_INFO |= (1 << PIN_INFO_ASTB)
#define configure_pin_te() DDR_INFO &= ~(1 << PIN_INFO_TE)
#define configure_pin_wdardy() DDR_INFO &= ~(1 << PIN_INFO_WDARDY)
#define configure_pin_tr() DDR_INFO |= (1 << PIN_INFO_TR)
#define configure_pin_reset() DDR_INFO &= ~(1 << PIN_INFO_RST)
#define port_data_set(x) (PORT_DATA = x)
#define port_info_set(x) (PORT_INFO = x)
#define port_data_get(x) PIN_DATA
#define port_info_get(x) PIN_INFO
#define port_data_set(x) (PORT_DATA = x)
#define port_info_set(x) (PORT_INFO = x)
#define port_data_get(x) PIN_DATA
#define port_info_get(x) PIN_INFO
#define DATA_CLEAR 0x00
#define INFO_CLEAR 0x00
/* input pin handling */
#define isset_info_reset() ((PIN_INFO) & (1 << PIN_INFO_RST))
#define isset_info_te() ((PIN_INFO) & (1 << PIN_INFO_TE))
#define isset_info_wdardy() ((PIN_INFO) & (1 << PIN_INFO_WDARDY))
#define INFO_ASTB (1 << PIN_INFO_ASTB)
#define INFO_STAT_GCMD (1 << PIN_INFO_STATUS0) /* 0x01 */
#define INFO_STAT_RDATA (1 << PIN_INFO_STATUS1) /* 0x02 */
#define INFO_STAT_WDATA ((1 << PIN_INFO_STATUS0) | (1 << PIN_INFO_STATUS1)) /* 0x03 */
#define INFO_STAT_ERROR ((1 << PIN_INFO_STATUS0) | (1 << PIN_INFO_STATUS1) | (1 << PIN_INFO_STATUS1)) /* 0x07 */
/* output pin handling */
#define DATA_CLEAR 0x00
#define INFO_CLEAR 0x00
#endif /* MAIN_H_ */
#define INFO_ASTB (1 << PIN_INFO_ASTB)
#define INFO_STAT_GCMD (1 << PIN_INFO_STATUS0) /* 0x01 */
#define INFO_STAT_RDATA (a1 << PIN_INFO_STATUS1) /* 0x02 */
#define INFO_STAT_WDATA ((1 << PIN_INFO_STATUS0) | (1 << PIN_INFO_STATUS1)) /* 0x03 */
#define INFO_STAT_ERROR ((1 << PIN_INFO_STATUS0) | (1 << PIN_INFO_STATUS1) | (1 << PIN_INFO_STATUS2)) /* 0x07 */
#endif /* MAIN_H_ */