parent
8b0040a5ee
commit
71f99685e6
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@ -26,42 +26,42 @@
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_putcf::
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_putcf::
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{
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{
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ldctl r1,fcw
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ldctl r1,fcw //save processor status
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di vi,nvi
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di vi,nvi //dvi
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ldl rr4,_cfreelist
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ldl rr4,_cfreelist
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ldl @rr6,rr4
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ldl @rr6,rr4 //cbptr->c_next = cfreelist.c_next
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ldl _cfreelist,rr6
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ldl _cfreelist,rr6 //cfreelist.c_next = cbptr
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ldctl fcw,r1
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ldctl fcw,r1 //restore processor status
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ret
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ret
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} /* _putcf */
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} /* _putcf */
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_getcf::
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_getcf::
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{
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{
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ldctl r1,fcw
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ldctl r1,fcw //save processor status
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di vi,nvi
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di vi,nvi //dvi
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ldl rr2,_cfreelist
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ldl rr2,_cfreelist //rr2 = cfreelist
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testl rr2
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testl rr2
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jr z,~egetcf
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jr z,~end //if its 0, then just return.
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ldl rr4,@rr2
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ldl rr4,@rr2
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ldl _cfreelist,rr4
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ldl _cfreelist,rr4 //cfreelist.c_next = cfreelist.c_next->c_next
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subl rr6,rr6
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subl rr6,rr6
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ldl @rr2,rr6
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ldl @rr2,rr6 //clear c_next in cblock
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ld r0,_cfreelist+4
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ld r0,_cfreelist+4
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ld rr2(#4),r0
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ld rr2(#4),r0
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~egetcf:
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~end:
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ldctl fcw,r1
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ldctl fcw,r1 //restore processor status
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ret
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ret
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}
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}
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_getcb::
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_getcb::
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{
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{
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ldctl r1,fcw
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ldctl r1,fcw //save processor status
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di vi,nvi
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di vi,nvi //dvi
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ldl rr2,rr6(#2)
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ldl rr2,rr6(#2) //rr2 = ptr->c_cf
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testl rr2
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testl rr2
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jr z,~egetcb
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jr z,~end //if its 0, then just return.
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ld r0,rr2(#4)
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ld r0,rr2(#4)
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subb rl0,rh0
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subb rl0,rh0
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@ -72,29 +72,29 @@ _getcb::
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ldl rr4,@rr2
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ldl rr4,@rr2
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ldl rr6(#2),rr4
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ldl rr6(#2),rr4
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testl rr4
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testl rr4
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jpr ne,~egetcb
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jpr ne,~end
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subl rr4,rr4
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subl rr4,rr4
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ldl rr6(#6),rr4
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ldl rr6(#6),rr4
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~egetcb:
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~end:
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ldctl fcw,r1
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ldctl fcw,r1 //restore processor status
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ret
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ret
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}
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}
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_putcb::
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_putcb::
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{
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{
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ldctl r1,fcw
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ldctl r1,fcw //save processor status
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push @r14,r1
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push @r14,r1
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di vi,nvi
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di vi,nvi //dvi
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ldl rr2,rr4(#6)
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ldl rr2,rr4(#6)
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testl rr2
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testl rr2
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jpr ne,~else_putcb
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jpr ne,L1
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ldl rr4(#2),rr6
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ldl rr4(#2),rr6
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ldl rr4(#6),rr6
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ldl rr4(#6),rr6
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jpr ~endif_putcb
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jpr L2
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~else_putcb:
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L1:
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ldl rr4(#6),rr6
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ldl rr4(#6),rr6
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ldl @rr2,rr6
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ldl @rr2,rr6
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~endif_putcb:
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L2:
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subl rr0,rr0
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subl rr0,rr0
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ldl @rr6,rr0
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ldl @rr6,rr0
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ld r1,rr6(#4)
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ld r1,rr6(#4)
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add r0,r1
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add r0,r1
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ld @rr4,r0
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ld @rr4,r0
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pop r1,@rr14
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pop r1,@rr14
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ldctl fcw,r1
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ldctl fcw,r1 //restore processor status
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ret
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ret
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}
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}
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_getc::
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_getc::
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{
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{
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ldctl r1,fcw
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ldctl r1,fcw //save processor status
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push @r14,r1
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push @r14,r1
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di vi,nvi
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di vi,nvi //dvi
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dec @rr6,#1
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dec @rr6,#1
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jpr lt,~else_getc
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jpr lt,L3
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ldl rr2,rr6(#2)
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ldl rr2,rr6(#2)
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lda rr4,rr2(#4)
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lda rr4,rr2(#4)
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ldb rl1,@rr4
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ldb rl1,@rr4
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subb rh1,rh1
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subb rh1,rh1
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ldb rl0,rr2(#5)
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ldb rl0,rr2(#5)
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cpb rl0,@rr4
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cpb rl0,@rr4
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jr eq,~endif_getc
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jr eq,L4
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inc r5,#2
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inc r5,#2
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add r5,r1
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add r5,r1
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ldb rl2,@rr4
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ldb rl2,@rr4
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subb rh2,rh2
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subb rh2,rh2
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~egetc:
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~end:
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pop r1,@rr14
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pop r1,@rr14
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ldctl fcw,r1
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ldctl fcw,r1 //restore processor status
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ret
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ret
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~else_getc:
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L3:
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inc @rr6,#1
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inc @rr6,#1
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ld r2,#-1
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ld r2,#-1
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jpr ~egetc
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jpr ~end
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~endif_getc:
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L4:
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inc r5,#2
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inc r5,#2
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add r5,r1
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add r5,r1
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ldb rl0,@rr4
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ldb rl0,@rr4
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ldl rr4,@rr2
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ldl rr4,@rr2
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ldl rr6(#2),rr4
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ldl rr6(#2),rr4
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testl rr4
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testl rr4
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jpr ne,~else2_getc
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jpr ne,L5
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ldl rr6(#6),rr4
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ldl rr6(#6),rr4
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~else2_getc:
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L5:
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ldl rr4,_cfreelist //get link to first free cblock
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ldl rr4,_cfreelist //get link to first free cblock
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ldl @rr2,rr4 //put it into link of new free cblock
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ldl @rr2,rr4 //put it into link of new free cblock
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ldl _cfreelist,rr2 //put address of new free cblock into cfreelist
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ldl _cfreelist,rr2 //put address of new free cblock into cfreelist
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ldb rl2,rl0
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ldb rl2,rl0
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subb rh2,rh2
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subb rh2,rh2
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jpr ~egetc
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jpr ~end
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}
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}
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_putc::
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_putc::
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{
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{
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ldctl r6,fcw
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ldctl r6,fcw //save processor status
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di vi,nvi
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di vi,nvi //dvi
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ldl rr2,rr4(#6)
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ldl rr2,rr4(#6)
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testl rr2
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testl rr2
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jpr eq,~else_putc
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jpr eq,L7
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~L0:
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L6:
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ldb rl0,rr2(#5)
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ldb rl0,rr2(#5)
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subb rh0,rh0
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subb rh0,rh0
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cp r0,_cfreelist+4
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cp r0,_cfreelist+4
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jpr ge,~endif2_putc
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jpr ge,L10
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inc @rr4,#1
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inc @rr4,#1
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lda rr4,rr2(#6)
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lda rr4,rr2(#6)
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add r5,r0
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add r5,r0
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incb rl0,#1
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incb rl0,#1
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ldb rr2(#5),rl0
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ldb rr2(#5),rl0
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clr r2
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clr r2
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~eputc:
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~end:
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ldctl fcw,r6
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ldctl fcw,r6 //restore processor status
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ret
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ret
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~else_putc:
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L7:
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ldl rr2,_cfreelist
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ldl rr2,_cfreelist
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testl rr2
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testl rr2
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jpr eq,~endif_putc
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jpr eq,L9
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ldl rr4(#2),rr2
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ldl rr4(#2),rr2
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~L1:
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L8:
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ldl rr0,@rr2
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ldl rr0,@rr2
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ldl _cfreelist,rr0
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ldl _cfreelist,rr0
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clr @rr2
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clr @rr2
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subl rr0,rr0
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subl rr0,rr0
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ldl rr2(#2),rr0
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ldl rr2(#2),rr0
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ldl rr4(#6),rr2
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ldl rr4(#6),rr2
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jpr ~L0
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jpr L6
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~endif_putc:
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L9:
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ld r2,#-1
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ld r2,#-1
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jpr ~eputc
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jpr ~end
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~endif2_putc:
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L10:
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ldl rr0,_cfreelist
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ldl rr0,_cfreelist
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testl rr0
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testl rr0
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jpr eq,~endif_putc
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jpr eq,L9
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ldl @rr2,rr0
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ldl @rr2,rr0
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ldl rr2,rr0
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ldl rr2,rr0
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jpr ~L1
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jpr L8
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}
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}
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Loading…
Reference in New Issue