move to extra github project

This commit is contained in:
Oliver Lehmann 2015-11-18 19:56:17 +01:00
parent 92cda04b6d
commit 40c3689a0d
43 changed files with 0 additions and 28272 deletions

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Microsoft Visual Studio Solution File, Format Version 11.00
# Atmel Studio Solution File, Format Version 11.00
Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "P8000_WDC_Emulator", "P8000_WDC_Emulator\P8000_WDC_Emulator.cproj", "{257C9A83-A686-455C-AC90-D649B30AA14D}"
EndProject
Global
GlobalSection(SolutionConfigurationPlatforms) = preSolution
Debug|AVR = Debug|AVR
Release|AVR = Release|AVR
EndGlobalSection
GlobalSection(ProjectConfigurationPlatforms) = postSolution
{257C9A83-A686-455C-AC90-D649B30AA14D}.Debug|AVR.ActiveCfg = Debug|AVR
{257C9A83-A686-455C-AC90-D649B30AA14D}.Debug|AVR.Build.0 = Debug|AVR
{257C9A83-A686-455C-AC90-D649B30AA14D}.Release|AVR.ActiveCfg = Release|AVR
{257C9A83-A686-455C-AC90-D649B30AA14D}.Release|AVR.Build.0 = Release|AVR
EndGlobalSection
GlobalSection(SolutionProperties) = preSolution
HideSolutionNode = FALSE
EndGlobalSection
EndGlobal

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P8000_WDC_Emulator_6_0.cproj
P8000_WDC_Emulator_6_0.atsuo

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################################################################################
# Automatically-generated file. Do not edit!
################################################################################
SHELL := cmd.exe
RM := rm -rf
USER_OBJS :=
LIBS :=
PROJ :=
O_SRCS :=
C_SRCS :=
S_SRCS :=
S_UPPER_SRCS :=
OBJ_SRCS :=
ASM_SRCS :=
PREPROCESSING_SRCS :=
OBJS :=
OBJS_AS_ARGS :=
C_DEPS :=
C_DEPS_AS_ARGS :=
EXECUTABLES :=
OUTPUT_FILE_PATH :=
OUTPUT_FILE_PATH_AS_ARGS :=
AVR_APP_PATH :=$$$AVR_APP_PATH$$$
QUOTE := "
ADDITIONAL_DEPENDENCIES:=
OUTPUT_FILE_DEP:=
LIB_DEP:=
# Every subdirectory with source files must be described here
SUBDIRS :=
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../wdc_avr.c \
../wdc_drv_pata.c \
../wdc_main.c \
../wdc_drv_mmc.c \
../wdc_if_disk_perf.c \
../uart.c \
../wdc_if_p8000.c \
../wdc_if_disk.c \
../wdc_par.c \
../wdc_ram.c
PREPROCESSING_SRCS +=
ASM_SRCS +=
OBJS += \
wdc_avr.o \
wdc_drv_pata.o \
wdc_main.o \
wdc_drv_mmc.o \
wdc_if_disk_perf.o \
uart.o \
wdc_if_p8000.o \
wdc_if_disk.o \
wdc_par.o \
wdc_ram.o
OBJS_AS_ARGS += \
wdc_avr.o \
wdc_drv_pata.o \
wdc_main.o \
wdc_drv_mmc.o \
wdc_if_disk_perf.o \
uart.o \
wdc_if_p8000.o \
wdc_if_disk.o \
wdc_par.o \
wdc_ram.o
C_DEPS += \
wdc_avr.d \
wdc_drv_pata.d \
wdc_main.d \
wdc_drv_mmc.d \
wdc_if_disk_perf.d \
uart.d \
wdc_if_p8000.d \
wdc_if_disk.d \
wdc_par.d \
wdc_ram.d
C_DEPS_AS_ARGS += \
wdc_avr.d \
wdc_drv_pata.d \
wdc_main.d \
wdc_drv_mmc.d \
wdc_if_disk_perf.d \
uart.d \
wdc_if_p8000.d \
wdc_if_disk.d \
wdc_par.d \
wdc_ram.d
OUTPUT_FILE_PATH +=P8000_WDC_Emulator.elf
OUTPUT_FILE_PATH_AS_ARGS +=P8000_WDC_Emulator.elf
ADDITIONAL_DEPENDENCIES:=
OUTPUT_FILE_DEP:= ./makedep.mk
LIB_DEP+=
# AVR32/GNU C Compiler
./%.o: .././%.c
@echo Building file: $<
@echo Invoking: AVR/GNU C Compiler : 3.4.2
$(QUOTE)C:\Program Files (x86)\Atmel\Atmel Toolchain\AVR8 GCC\Native\3.4.2.939\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -funsigned-char -funsigned-bitfields -O1 -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -Wall -Wundef -Werror -pedantic -pedantic-errors -mmcu=atmega1284p -c -save-temps -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
@echo Finished building: $<
# AVR32/GNU Preprocessing Assembler
# AVR32/GNU Assembler
ifneq ($(MAKECMDGOALS),clean)
ifneq ($(strip $(C_DEPS)),)
-include $(C_DEPS)
endif
endif
# Add inputs and outputs from these tool invocations to the build variables
# All Target
all: $(OUTPUT_FILE_PATH) $(ADDITIONAL_DEPENDENCIES)
$(OUTPUT_FILE_PATH): $(OBJS) $(USER_OBJS) $(OUTPUT_FILE_DEP) $(LIB_DEP)
@echo Building target: $@
@echo Invoking: AVR/GNU Linker : 3.4.2
$(QUOTE)C:\Program Files (x86)\Atmel\Atmel Toolchain\AVR8 GCC\Native\3.4.2.939\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -o$(OUTPUT_FILE_PATH_AS_ARGS) $(OBJS_AS_ARGS) $(USER_OBJS) $(LIBS) -Wl,-Map="P8000_WDC_Emulator.map" -Wl,--start-group -Wl,-lm -Wl,--end-group -Wl,--gc-sections -mmcu=atmega1284p
@echo Finished building target: $@
"C:\Program Files (x86)\Atmel\Atmel Toolchain\AVR8 GCC\Native\3.4.2.939\avr8-gnu-toolchain\bin\avr-objcopy.exe" -O ihex -R .eeprom -R .fuse -R .lock -R .signature "P8000_WDC_Emulator.elf" "P8000_WDC_Emulator.hex"
"C:\Program Files (x86)\Atmel\Atmel Toolchain\AVR8 GCC\Native\3.4.2.939\avr8-gnu-toolchain\bin\avr-objcopy.exe" -j .eeprom --set-section-flags=.eeprom=alloc,load --change-section-lma .eeprom=0 --no-change-warnings -O ihex "P8000_WDC_Emulator.elf" "P8000_WDC_Emulator.eep" || exit 0
"C:\Program Files (x86)\Atmel\Atmel Toolchain\AVR8 GCC\Native\3.4.2.939\avr8-gnu-toolchain\bin\avr-objdump.exe" -h -S "P8000_WDC_Emulator.elf" > "P8000_WDC_Emulator.lss"
"C:\Program Files (x86)\Atmel\Atmel Toolchain\AVR8 GCC\Native\3.4.2.939\avr8-gnu-toolchain\bin\avr-objcopy.exe" -O srec -R .eeprom -R .fuse -R .lock -R .signature "P8000_WDC_Emulator.elf" "P8000_WDC_Emulator.srec"
"C:\Program Files (x86)\Atmel\Atmel Toolchain\AVR8 GCC\Native\3.4.2.939\avr8-gnu-toolchain\bin\avr-size.exe" "P8000_WDC_Emulator.elf"
# Other Targets
clean:
-$(RM) $(OBJS_AS_ARGS) $(EXECUTABLES)
-$(RM) $(C_DEPS_AS_ARGS)
rm -rf "P8000_WDC_Emulator.elf" "P8000_WDC_Emulator.a" "P8000_WDC_Emulator.hex" "P8000_WDC_Emulator.lss" "P8000_WDC_Emulator.eep" "P8000_WDC_Emulator.map" "P8000_WDC_Emulator.srec"

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################################################################################
# Automatically-generated file. Do not edit or delete the file
################################################################################
wdc_avr.c
wdc_drv_pata.c
wdc_main.c
wdc_drv_mmc.c
wdc_if_disk_perf.c
uart.c
wdc_if_p8000.c
wdc_if_disk.c
wdc_par.c
wdc_ram.c

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PCB
P8000_WDC_Emulator.ps
P8000_WDC_Emulator.bck
P8000_WDC_Emulator.000
P8000_WDC_Emulator-cache.lib

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Cmp-Mod V01 Genere par PcbNew le 14.07.2013 14:28:52
BeginCmp
TimeStamp = /4FDF8116;
Reference = 1C1;
ValeurCmp = 100n;
IdModule = C1;
EndCmp
BeginCmp
TimeStamp = /517968F8;
Reference = 1C2;
ValeurCmp = 330n;
IdModule = C1;
EndCmp
BeginCmp
TimeStamp = /4FDF527D;
Reference = 1C6;
ValeurCmp = 22p;
IdModule = C1;
EndCmp
BeginCmp
TimeStamp = /4FDF660D;
Reference = 1D4;
ValeurCmp = 74HCT573;
IdModule = DIP-20__300;
EndCmp
BeginCmp
TimeStamp = /4FDE250D;
Reference = 1D6;
ValeurCmp = 74HCT245;
IdModule = DIP-20__300;
EndCmp
BeginCmp
TimeStamp = /4FDF74B9;
Reference = 1L1;
ValeurCmp = LED;
IdModule = LED-5MM;
EndCmp
BeginCmp
TimeStamp = /4FDF74B6;
Reference = 1R4;
ValeurCmp = 220;
IdModule = R1;
EndCmp
BeginCmp
TimeStamp = /4FDF8149;
Reference = 2C1;
ValeurCmp = 100n;
IdModule = C1;
EndCmp
BeginCmp
TimeStamp = /5179694E;
Reference = 2C2;
ValeurCmp = 330n;
IdModule = C1;
EndCmp
BeginCmp
TimeStamp = /4FDF52C6;
Reference = 2C6;
ValeurCmp = 22p;
IdModule = C1;
EndCmp
BeginCmp
TimeStamp = /4FDF65CE;
Reference = 2D4;
ValeurCmp = 74HCT573;
IdModule = DIP-20__300;
EndCmp
BeginCmp
TimeStamp = /4FDE3327;
Reference = 2D6;
ValeurCmp = 74HCT245;
IdModule = DIP-20__300;
EndCmp
BeginCmp
TimeStamp = /4FDF6D8E;
Reference = 2L1;
ValeurCmp = LED;
IdModule = LED-5MM;
EndCmp
BeginCmp
TimeStamp = /4FDF6D7E;
Reference = 2R4;
ValeurCmp = 220;
IdModule = R1;
EndCmp
BeginCmp
TimeStamp = /4FDF5FEF;
Reference = 3C1;
ValeurCmp = 100n;
IdModule = C1;
EndCmp
BeginCmp
TimeStamp = /5179691C;
Reference = 3C2;
ValeurCmp = 330n;
IdModule = C1;
EndCmp
BeginCmp
TimeStamp = /4FDF60A7;
Reference = 3R4;
ValeurCmp = 220;
IdModule = R1;
EndCmp
BeginCmp
TimeStamp = /4FDF60BB;
Reference = 4C1;
ValeurCmp = 100n;
IdModule = C1;
EndCmp
BeginCmp
TimeStamp = /4FDF743F;
Reference = 5C1;
ValeurCmp = 100n;
IdModule = C1;
EndCmp
BeginCmp
TimeStamp = /4FDF744A;
Reference = 6C1;
ValeurCmp = 100n;
IdModule = C1;
EndCmp
BeginCmp
TimeStamp = /4FDF744C;
Reference = 7C1;
ValeurCmp = 100n;
IdModule = C1;
EndCmp
BeginCmp
TimeStamp = /4FDF744E;
Reference = 8C1;
ValeurCmp = 100n;
IdModule = C1;
EndCmp
BeginCmp
TimeStamp = /4FDF7451;
Reference = 9C1;
ValeurCmp = 100n;
IdModule = C1;
EndCmp
BeginCmp
TimeStamp = /4FDF745A;
Reference = 10C1;
ValeurCmp = 100n;
IdModule = C1;
EndCmp
BeginCmp
TimeStamp = /4FDF745B;
Reference = 11C1;
ValeurCmp = 100n;
IdModule = C1;
EndCmp
BeginCmp
TimeStamp = /4FDF7481;
Reference = 12C1;
ValeurCmp = 100n;
IdModule = C1;
EndCmp
BeginCmp
TimeStamp = /517968CB;
Reference = C3;
ValeurCmp = 100n;
IdModule = C1;
EndCmp
BeginCmp
TimeStamp = /4FDF5FE6;
Reference = C4;
ValeurCmp = 47u;
IdModule = C1V5;
EndCmp
BeginCmp
TimeStamp = /4FDF60B2;
Reference = C5;
ValeurCmp = 1u;
IdModule = C1V5;
EndCmp
BeginCmp
TimeStamp = /4FDE10FA;
Reference = D1;
ValeurCmp = ATMEGA1284-P;
IdModule = DIP-40__600;
EndCmp
BeginCmp
TimeStamp = /4FDE2C78;
Reference = D2;
ValeurCmp = MAX3232;
IdModule = DIP-16__300;
EndCmp
BeginCmp
TimeStamp = /4FE371A3;
Reference = D3;
ValeurCmp = LM317;
IdModule = TO92-LM317;
EndCmp
BeginCmp
TimeStamp = /4FDE31F2;
Reference = D5;
ValeurCmp = 74HCT138;
IdModule = DIP-16__300;
EndCmp
BeginCmp
TimeStamp = /4FDF63C6;
Reference = D7;
ValeurCmp = 74HCT32;
IdModule = DIP-14__300;
EndCmp
BeginCmp
TimeStamp = /5176DD54;
Reference = D8;
ValeurCmp = 74HCT04;
IdModule = DIP-14__300;
EndCmp
BeginCmp
TimeStamp = /5176D7FD;
Reference = D9;
ValeurCmp = 74HCT03;
IdModule = DIP-14__300;
EndCmp
BeginCmp
TimeStamp = /4FDF4E3D;
Reference = JP1;
ValeurCmp = JUMPER;
IdModule = PIN_ARRAY_2X1;
EndCmp
BeginCmp
TimeStamp = /4FDF4E3B;
Reference = JP2;
ValeurCmp = JUMPER;
IdModule = PIN_ARRAY_2X1;
EndCmp
BeginCmp
TimeStamp = /4FDF4E36;
Reference = JP3;
ValeurCmp = JUMPER;
IdModule = PIN_ARRAY_2X1;
EndCmp
BeginCmp
TimeStamp = /4FDF4E32;
Reference = JP4;
ValeurCmp = JUMPER;
IdModule = PIN_ARRAY_2X1;
EndCmp
BeginCmp
TimeStamp = /4FDF5237;
Reference = Q1;
ValeurCmp = CRYSTAL;
IdModule = crystal_hc-49s;
EndCmp
BeginCmp
TimeStamp = /4FDF5E46;
Reference = R1;
ValeurCmp = 1k8;
IdModule = pin_strip_8;
EndCmp
BeginCmp
TimeStamp = /4FDF61F0;
Reference = R2;
ValeurCmp = 3k3;
IdModule = PIN_ARRAY_5x1;
EndCmp
BeginCmp
TimeStamp = /4FDF534E;
Reference = R3;
ValeurCmp = 10k;
IdModule = R1;
EndCmp
BeginCmp
TimeStamp = /51742221;
Reference = R5;
ValeurCmp = R-SIL_6;
IdModule = pin_strip_7;
EndCmp
BeginCmp
TimeStamp = /4FDF60AB;
Reference = R6;
ValeurCmp = 330;
IdModule = R1;
EndCmp
BeginCmp
TimeStamp = /4FDF540D;
Reference = SW1;
ValeurCmp = SW_PUSH;
IdModule = SW_6x6;
EndCmp
BeginCmp
TimeStamp = /4FE36B44;
Reference = X1;
ValeurCmp = CONN_5X2;
IdModule = PIN_ARRAY_5x2;
EndCmp
BeginCmp
TimeStamp = /51973111;
Reference = X2;
ValeurCmp = CONN_13X2;
IdModule = pin_array_13x2;
EndCmp
BeginCmp
TimeStamp = /4FDF5E6E;
Reference = X3;
ValeurCmp = SD-CON;
IdModule = sd_cocket_yamaichi_fps009_3001;
EndCmp
BeginCmp
TimeStamp = /4FDF685B;
Reference = X4;
ValeurCmp = PATA;
IdModule = PIN_ARRAY_20X2;
EndCmp
BeginCmp
TimeStamp = /517569F9;
Reference = X5;
ValeurCmp = 4_PIN_MOLEX;
IdModule = 4PIN_MOLEX;
EndCmp
BeginCmp
TimeStamp = /517569F2;
Reference = X6;
ValeurCmp = 4_PIN_MOLEX;
IdModule = 4PIN_MOLEX;
EndCmp
BeginCmp
TimeStamp = /4FE5DEFA;
Reference = X7;
ValeurCmp = ISP;
IdModule = pin_array_3x2;
EndCmp
BeginCmp
TimeStamp = /51972B4B;
Reference = X8;
ValeurCmp = CONN_13X2;
IdModule = pin_array_13x2;
EndCmp
EndListe

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EESchema-DOCLIB Version 2.0 Date: 14.07.2013 12:09:21
#
$CMP LM317
D Linear Regulator (adjustable)
K POWER REGUL
F regulator/lm117.pdf
$ENDCMP
#
$CMP R_PACK4
D 4 resistors Pack
K R DEV
$ENDCMP
#
#End Doc Library

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EESchema-LIBRARY Version 2.3 Date: 14.07.2013 12:09:21
#encoding utf-8
#
# 4_Pin_Molex
#
DEF 4_Pin_Molex XS 0 40 Y Y 1 F N
F0 "XS" 250 150 60 H V C CNN
F1 "4_Pin_Molex" -50 400 60 H V C CNN
DRAW
S -250 0 150 300 0 1 0 N
X +5V 1 -200 -300 300 U 50 50 1 1 P
X GND 2 -100 -300 300 U 50 50 1 1 P
X GND 3 0 -300 300 U 50 50 1 1 P
X +12V 4 100 -300 300 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# COAX_PWR
#
DEF COAX_PWR XS 0 40 Y Y 1 F N
F0 "XS" 350 50 60 H V C CNN
F1 "COAX_PWR" 0 350 60 H V C CNN
DRAW
C 0 0 50 0 1 0 N
C 0 0 255 0 1 0 N
X +12V ~ 0 -450 402 U 50 50 1 1 O
X GND ~ 100 -450 217 U 50 50 1 1 O
ENDDRAW
ENDDEF
#
# EFS_26
#
DEF EFS_26 X 0 10 Y N 1 F N
F0 "X" 0 700 60 H V C CNN
F1 "EFS_26" 0 0 50 V V C CNN
DRAW
S -100 650 100 -650 0 1 0 N
X P1 A1 -400 600 300 R 40 30 1 1 P I
X P2 B1 400 600 300 L 40 30 1 1 P I
X P3 A2 -400 500 300 R 40 30 1 1 P I
X P4 B2 400 500 300 L 40 30 1 1 P I
X P5 A3 -400 400 300 R 40 30 1 1 P I
X P6 B3 400 400 300 L 40 30 1 1 P I
X P7 A4 -400 300 300 R 40 30 1 1 P I
X P8 B4 400 300 300 L 40 30 1 1 P I
X P9 A5 -400 200 300 R 40 30 1 1 P I
X P10 B5 400 200 300 L 40 30 1 1 P I
X P11 A6 -400 100 300 R 40 30 1 1 P I
X P12 B6 400 100 300 L 40 30 1 1 P I
X P13 A7 -400 0 300 R 40 30 1 1 P I
X P14 B7 400 0 300 L 40 30 1 1 P I
X P15 A8 -400 -100 300 R 40 30 1 1 P I
X P16 B8 400 -100 300 L 40 30 1 1 P I
X P17 A9 -400 -200 300 R 40 30 1 1 P I
X P18 B9 400 -200 300 L 40 30 1 1 P I
X P19 A10 -400 -300 300 R 40 30 1 1 P I
X P20 B10 400 -300 300 L 40 30 1 1 P I
X P21 A11 -400 -400 300 R 40 30 1 1 P I
X P22 B11 400 -400 300 L 40 30 1 1 P I
X P23 A12 -400 -500 300 R 40 30 1 1 P I
X P20 B12 400 -500 300 L 40 30 1 1 P I
X P24 A13 -400 -600 300 R 40 30 1 1 P I
X P22 B13 400 -600 300 L 40 30 1 1 P I
ENDDRAW
ENDDEF
#
# LM317
#
DEF LM317 U 0 40 Y Y 1 F N
F0 "U" 0 300 60 H V C CNN
F1 "LM317" 50 -250 60 H V L CNN
DRAW
S -250 250 250 -200 0 1 0 N
X ADJ 1 0 -350 150 U 60 40 1 1 I
X OUT 2 400 150 150 L 60 40 1 1 w
X IN 3 -400 150 150 R 60 40 1 1 I
ENDDRAW
ENDDEF
#
# MAX3232
#
DEF MAX3232 IC 0 40 Y Y 2 L N
F0 "IC" -400 725 50 H V L BNN
F1 "MAX3232" -400 -800 50 H V L BNN
F2 "maxim-DIL16" 0 150 50 H I C CNN
DRAW
X GND 15 0 -700 0 U 50 50 0 0 W N
X VCC 16 0 700 0 D 50 50 0 0 W N
P 2 1 0 0 -400 700 -400 -700 N
P 2 1 0 0 -400 700 400 700 N
P 2 1 0 0 400 -700 -400 -700 N
P 2 1 0 0 400 -700 400 700 N
X C1+ 1 -600 600 200 R 40 40 1 1 P
X V+ 2 600 500 200 L 40 40 1 1 P
X C1- 3 -600 400 200 R 40 40 1 1 P
X C2+ 4 -600 200 200 R 40 40 1 1 P
X C2- 5 -600 0 200 R 40 40 1 1 P
X V- 6 600 300 200 L 40 40 1 1 P
X T2OUT 7 600 -300 200 L 40 40 1 1 O
X R2IN 8 600 -600 200 L 40 40 1 1 I
X R2OUT 9 -600 -600 200 R 40 40 1 1 O
X T2IN 10 -600 -300 200 R 40 40 1 1 I
X T1IN 11 -600 -200 200 R 40 40 1 1 I
X R1OUT 12 -600 -500 200 R 40 40 1 1 O
X R1IN 13 600 -500 200 L 40 40 1 1 I
X T1OUT 14 600 -200 200 L 40 40 1 1 O
X GND 15 0 -300 200 U 40 40 2 1 W
X VCC 16 0 300 200 D 40 40 2 1 W
ENDDRAW
ENDDEF
#
# MINI_DIN_6
#
DEF MINI_DIN_6 X 0 40 Y Y 1 F N
F0 "X" -400 525 50 H V L BNN
F1 "MINI_DIN_6" 0 525 50 H V L BNN
F2 "mini_din-M_DIN6" 0 150 50 H I C CNN
DRAW
T 0 70 -55 70 0 1 0 1 Normal 0 C C
T 0 -50 -55 70 0 1 0 2 Normal 0 C C
T 0 160 105 70 0 1 0 3 Normal 0 C C
T 0 -145 105 70 0 1 0 5 Normal 0 C C
T 0 105 205 70 0 1 0 6 Normal 0 C C
T 0 -95 205 70 0 1 0 8 Normal 0 C C
T 0 -280 -195 60 0 1 0 PE Normal 0 C C
T 0 295 -195 60 0 1 0 PE Normal 0 C C
P 2 1 0 0 -400 -300 -400 500 N
P 2 1 0 0 -400 -300 400 -300 N
P 2 1 0 0 -350 -250 0 -250 N
P 2 1 0 0 -310 -100 -130 -60 N
P 2 1 0 0 -300 100 -225 100 N
P 2 1 0 0 -200 200 -175 200 N
P 2 1 0 0 -50 350 -50 450 N
P 2 1 0 0 -50 350 50 350 N
P 2 1 0 0 -50 450 50 450 N
P 2 1 0 0 0 -250 0 -200 N
P 2 1 0 0 0 -250 350 -250 N
P 2 1 0 0 50 450 50 350 N
P 2 1 0 0 125 -60 300 -100 N
P 2 1 0 0 175 200 225 200 N
P 2 1 0 0 225 100 300 100 N
P 2 1 0 0 400 500 -400 500 N
P 2 1 0 0 400 500 400 -300 N
A -200 100 25 901 -901 1 1 0 N -200 125 -200 75
A -150 200 25 901 -901 1 1 0 N -150 225 -150 175
A -105 -60 25 901 -901 1 1 0 N -105 -35 -105 -85
A 100 -60 25 -899 899 1 1 0 N 100 -85 100 -35
A 150 200 25 -899 899 1 1 0 N 150 175 150 225
A 200 100 25 -899 899 1 1 0 N 200 75 200 125
C 0 100 300 1 1 0 N
S -50 -225 50 -175 1 1 0 F
S -50 350 50 450 1 1 0 F
S -40 70 50 230 1 1 0 F
P 6 1 1 0 -120 -170 -120 -110 -120 -110 -220 -110 -220 -110 -120 -170 F
P 6 1 1 0 120 -170 120 -110 120 -110 220 -110 220 -110 120 -170 F
X 1 1 600 -100 300 L 40 40 1 1 P
X 2 2 -600 -100 300 R 40 40 1 1 P
X 3 3 600 100 300 L 40 40 1 1 P
X 5 5 -600 100 300 R 40 40 1 1 P
X 6 6 500 200 300 L 40 40 1 1 P
X 8 8 -500 200 300 R 40 40 1 1 P
X PE1 SH1 500 -200 100 L 40 40 1 1 W
X PE2 SH2 0 -400 200 U 40 40 1 1 W
X PE3 SH3 -500 -200 100 R 40 40 1 1 W
ENDDRAW
ENDDEF
#
# R-SIL_4
#
DEF R-SIL_4 R 0 0 Y N 1 F N
F0 "R" 0 250 50 H V C CNN
F1 "R-SIL_4" 0 200 50 H V C CNN
$FPLIST
R?
SM0603
SM0805
$ENDFPLIST
DRAW
P 3 0 1 0 -150 -180 -180 -150 -180 -150 N
P 3 0 1 0 -150 -80 -180 -50 -180 -50 N
P 3 0 1 0 -150 20 -180 50 -180 50 N
P 3 0 1 0 -150 120 -180 150 -180 150 N
P 3 0 1 0 180 -50 205 -50 205 -50 N
P 3 0 1 0 180 50 205 50 205 50 N
P 5 0 1 0 180 -150 205 -150 205 150 180 150 180 150 N
P 9 0 1 0 -150 -180 -100 -130 -50 -180 0 -130 50 -180 100 -130 150 -180 180 -150 180 -150 N
P 9 0 1 0 -150 -80 -100 -30 -50 -80 0 -30 50 -80 100 -30 150 -80 180 -50 180 -50 N
P 9 0 1 0 -150 20 -100 70 -50 20 0 70 50 20 100 70 150 20 180 50 180 50 N
P 9 0 1 0 -150 120 -100 170 -50 120 0 170 50 120 100 170 150 120 180 150 180 150 N
X ~ 1 300 0 95 L 50 50 1 1 P
X ~ 2 -300 150 120 R 50 50 1 1 P
X ~ 3 -300 50 120 R 50 50 1 1 P
X ~ 4 -300 -50 120 R 50 50 1 1 P
X ~ 5 -300 -150 120 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# R-SIL_5
#
DEF R-SIL_5 R 0 0 Y N 1 F N
F0 "R" 0 300 50 H V C CNN
F1 "R-SIL_5" -15 220 50 H V C CNN
$FPLIST
R?
SM0603
SM0805
$ENDFPLIST
DRAW
S 180 -250 200 -250 0 1 0 N
S 200 -250 205 -250 0 1 0 N
S 205 -250 205 -145 0 1 0 N
P 3 0 1 0 -150 -280 -180 -250 -180 -250 N
P 3 0 1 0 -150 -180 -180 -150 -180 -150 N
P 3 0 1 0 -150 -80 -180 -50 -180 -50 N
P 3 0 1 0 -150 20 -180 50 -180 50 N
P 3 0 1 0 -150 120 -180 150 -180 150 N
P 3 0 1 0 180 -50 205 -50 205 -50 N
P 3 0 1 0 180 50 205 50 205 50 N
P 5 0 1 0 180 -150 205 -150 205 150 180 150 180 150 N
P 9 0 1 0 -150 -280 -100 -230 -50 -280 0 -230 50 -280 100 -230 150 -280 180 -250 180 -250 N
P 9 0 1 0 -150 -180 -100 -130 -50 -180 0 -130 50 -180 100 -130 150 -180 180 -150 180 -150 N
P 9 0 1 0 -150 -80 -100 -30 -50 -80 0 -30 50 -80 100 -30 150 -80 180 -50 180 -50 N
P 9 0 1 0 -150 20 -100 70 -50 20 0 70 50 20 100 70 150 20 180 50 180 50 N
P 9 0 1 0 -150 120 -100 170 -50 120 0 170 50 120 100 170 150 120 180 150 180 150 N
X ~ 1 300 -50 95 L 50 50 1 1 P
X ~ 2 -300 150 120 R 50 50 1 1 P
X ~ 3 -300 50 120 R 50 50 1 1 P
X ~ 4 -300 -50 120 R 50 50 1 1 P
X ~ 5 -300 -150 120 R 50 50 1 1 P
X ~ 6 -300 -250 120 R 50 50 1 1 I
ENDDRAW
ENDDEF
#
# R-SIL_6
#
DEF R-SIL_6 R 0 0 Y N 1 F N
F0 "R" 0 300 50 H V C CNN
F1 "R-SIL_6" -15 220 50 H V C CNN
$FPLIST
R?
SM0603
SM0805
$ENDFPLIST
DRAW
S 180 -350 200 -350 0 1 0 N
S 180 -250 200 -250 0 1 0 N
S 200 -250 205 -250 0 1 0 N
S 200 -250 205 -250 0 1 0 N
S 200 -250 205 -250 0 1 0 N
S 200 -250 205 -250 0 1 0 N
S 205 -350 205 -245 0 1 0 N
S 205 -250 205 -145 0 1 0 N
P 3 0 1 0 -150 -380 -180 -350 -180 -350 N
P 3 0 1 0 -150 -280 -180 -250 -180 -250 N
P 3 0 1 0 -150 -180 -180 -150 -180 -150 N
P 3 0 1 0 -150 -80 -180 -50 -180 -50 N
P 3 0 1 0 -150 20 -180 50 -180 50 N
P 3 0 1 0 -150 120 -180 150 -180 150 N
P 3 0 1 0 180 -50 205 -50 205 -50 N
P 3 0 1 0 180 50 205 50 205 50 N
P 5 0 1 0 180 -150 205 -150 205 150 180 150 180 150 N
P 9 0 1 0 -150 -380 -100 -330 -50 -380 0 -330 50 -380 100 -330 150 -380 180 -350 180 -350 N
P 9 0 1 0 -150 -280 -100 -230 -50 -280 0 -230 50 -280 100 -230 150 -280 180 -250 180 -250 N
P 9 0 1 0 -150 -180 -100 -130 -50 -180 0 -130 50 -180 100 -130 150 -180 180 -150 180 -150 N
P 9 0 1 0 -150 -80 -100 -30 -50 -80 0 -30 50 -80 100 -30 150 -80 180 -50 180 -50 N
P 9 0 1 0 -150 20 -100 70 -50 20 0 70 50 20 100 70 150 20 180 50 180 50 N
P 9 0 1 0 -150 120 -100 170 -50 120 0 170 50 120 100 170 150 120 180 150 180 150 N
X ~ 1 300 -100 95 L 50 50 1 1 P
X ~ 2 -300 150 120 R 50 50 1 1 P
X ~ 3 -300 50 120 R 50 50 1 1 P
X ~ 4 -300 -50 120 R 50 50 1 1 P
X ~ 5 -300 -150 120 R 50 50 1 1 P
X ~ 6 -300 -250 120 R 50 50 1 1 I
X ~ 7 -300 -350 120 R 50 50 1 1 I
ENDDRAW
ENDDEF
#
# R_PACK4
#
DEF R_PACK4 RP 0 20 Y N 1 F N
F0 "RP" 0 450 40 H V C CNN
F1 "R_PACK4" 0 -50 40 H V C CNN
DRAW
P 5 0 1 0 -100 400 -100 0 100 0 100 400 -100 400 N
P 7 0 1 0 -100 50 -80 70 -40 30 0 70 40 30 80 70 100 50 N
P 7 0 1 0 -100 150 -80 170 -40 130 0 170 40 130 80 170 100 150 N
P 7 0 1 0 -100 250 -80 270 -40 230 0 270 40 230 80 270 100 250 N
P 7 0 1 0 -100 350 -80 370 -40 330 0 370 40 330 80 370 100 350 N
X P1 1 -200 350 100 R 40 40 1 1 P
X R1 2 200 350 100 L 40 40 1 1 P
X P2 3 -200 250 100 R 40 40 1 1 P
X R2 4 200 250 100 L 40 40 1 1 P
X P3 5 -200 150 100 R 40 40 1 1 P
X R3 6 200 150 100 L 40 40 1 1 P
X P4 7 -200 50 100 R 40 40 1 1 P
X R4 8 200 50 100 L 40 40 1 1 P
ENDDRAW
ENDDEF
#
# SD-CON
#
DEF SD-CON J 0 40 Y Y 1 F N
F0 "J" -50 -1000 60 H V C CNN
F1 "SD-CON" 0 0 60 H V C CNN
F2 "sdcard" -150 -1100 60 H V C CNN
DRAW
S -250 -50 200 -950 0 1 0 N
X SS 1 -550 -100 300 R 50 50 1 1 I
X DI 2 -550 -200 300 R 50 50 1 1 I
X GND 3 -550 -300 300 R 50 50 1 1 W
X VCC 4 -550 -400 300 R 50 50 1 1 W
X CLK 5 -550 -500 300 R 50 50 1 1 I C
X GND 6 -550 -600 300 R 50 50 1 1 W
X DO 7 -550 -700 300 R 50 50 1 1 O
X NC 8 -550 -800 300 R 50 50 1 1 I
X NC 9 -550 -900 300 R 50 50 1 1 I
ENDDRAW
ENDDEF
#
#End Library

View File

@ -1,103 +0,0 @@
update=04.09.2013 21:56:44
version=1
last_client=eeschema
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LibName2=sockets
LibName3=connect
LibName4=discret
LibName5=pin_array
LibName6=divers
LibName7=libcms
LibName8=display
LibName9=valves
LibName10=led
LibName11=dip_sockets
[eeschema]
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LibName6=linear
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LibName16=microchip
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LibName19=texas
LibName20=intel
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LibName24=philips
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View File

@ -1,54 +0,0 @@
comp = "1C1" module = "C1"
comp = "1C2" module = "C1"
comp = "1C6" module = "C1"
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comp = "6C1" module = "C1"
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comp = "10C1" module = "C1"
comp = "11C1" module = "C1"
comp = "12C1" module = "C1"
comp = "C3" module = "C1"
comp = "C4" module = "C1V5"
comp = "C5" module = "C1V5"
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comp = "JP4" module = "PIN_ARRAY_2X1"
comp = "Q1" module = "2PIN_6mm"
comp = "R1" module = "R3"
comp = "R2" module = "R3"
comp = "R3" module = "R3"
comp = "R5" module = "R3"
comp = "R6" module = "R3"
comp = "R7" module = "R3"
comp = "SW1" module = "2PIN_6mm"
comp = "X1" module = "DB9FC"
comp = "X2" module = "DB25FC"
comp = "X3" module = "SDCARD-REVERSE"
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File diff suppressed because it is too large Load Diff

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normal Normal { vector [
0.118045 -0.584665 -0.802641,
0.862474 -0.490523 -0.124602,
-0.811984 -0.572198 -0.115205,
0.100666 -0.733119 0.672609,
-0.811984 0.572198 -0.115205,
0.100666 0.733119 0.672609,
0.118045 0.584665 -0.802641,
0.862474 0.490523 -0.124602,
0.561255 -0.586135 -0.584327,
-0.592552 -0.568425 -0.570768,
-0.593590 0.570339 -0.567771,
0.563587 0.587540 -0.580660,
0.697056 -0.521507 0.492081,
-0.435825 -0.656977 0.615173,
-0.433414 0.655001 0.618972,
0.695961 0.520035 0.495178 ] }
normalIndex [
0, 1, 3, 2, -1,
0, 2, 4, 6, -1,
0, 6, 7, 1, -1,
1, 7, 5, 3, -1,
2, 3, 5, 4, -1,
4, 5, 7, 6, -1,
8, 9, 10, 11, -1,
8, 11, 15, 12, -1,
8, 12, 13, 9, -1,
9, 13, 14, 10, -1,
10, 14, 15, 11, -1,
12, 15, 14, 13, -1 ]
}
}
]
}
DEF cylinder2_sep21 Transform {
children [
Shape {
appearance Appearance {
material DEF color_012_068_105 Material {
diffuseColor 4.72381e-2 0.265714 0.413333
emissiveColor 0.00000e+0 0.00000e+0 0.00000e+0
specularColor 1.00000 1.00000 1.00000
ambientIntensity 1.00000
transparency 0.00000e+0
shininess 1.00000
}
}
geometry IndexedFaceSet {
normalPerVertex TRUE
coord Coordinate { point [
-0.400000 -0.400000 1.66465,
-0.400000 0.400000 1.66465,
-0.400000 0.400000 2.15265,
-0.400000 -0.400000 2.15265,
0.400000 -0.400000 1.66465,
0.400000 0.400000 1.66465,
0.400000 0.400000 2.15265,
0.400000 -0.400000 2.15265,
-4.76837e-8 0.800000 1.43042,
-0.306147 0.739104 1.43042,
-0.565685 0.565685 1.43042,
-0.739104 0.306147 1.43042,
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-0.739104 -0.306147 1.43042,
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-0.306147 -0.739104 1.43042,
-4.76837e-8 -0.800000 1.43042,
0.306147 -0.739104 1.43042,
0.565685 -0.565685 1.43042,
0.739104 -0.306147 1.43042,
0.800000 -4.44089e-16 1.43042,
0.739104 0.306147 1.43042,
0.565685 0.565685 1.43042,
0.306147 0.739104 1.43042,
-4.76837e-8 0.800000 1.67931,
-0.306147 0.739104 1.67931,
-0.565685 0.565685 1.67931,
-0.739104 0.306147 1.67931,
-0.800000 0.00000e+0 1.67931,
-0.739104 -0.306147 1.67931,
-0.565685 -0.565685 1.67931,
-0.306147 -0.739104 1.67931,
-4.76837e-8 -0.800000 1.67931,
0.306147 -0.739104 1.67931,
0.565685 -0.565685 1.67931,
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0.800000 -4.44089e-16 1.67931,
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0.565685 0.565685 1.67931,
0.306147 0.739104 1.67931,
-0.600000 -0.600000 2.02687,
-0.600000 0.600000 2.02687,
0.600000 -0.600000 2.02687,
0.600000 0.600000 2.02687,
-0.600000 0.600000 2.99860,
-0.600000 -0.600000 2.99860,
0.600000 0.600000 2.99860,
0.600000 -0.600000 2.99860,
-0.513956 0.513956 3.08465,
-0.513956 -0.513956 3.08465,
0.513956 -0.513956 3.08465,
0.513956 0.513956 3.08465 ] }
coordIndex [
0, 1, 5, 4, -1,
0, 3, 2, 1, -1,
0, 4, 7, 3, -1,
1, 2, 6, 5, -1,
2, 3, 7, 6, -1,
4, 5, 6, 7, -1,
8, 9, 25, 24, -1,
8, 23, 22, 21, 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, 10, 9, -1,
8, 24, 39, 23, -1,
9, 10, 26, 25, -1,
10, 11, 27, 26, -1,
11, 12, 28, 27, -1,
12, 13, 29, 28, -1,
13, 14, 30, 29, -1,
14, 15, 31, 30, -1,
15, 16, 32, 31, -1,
16, 17, 33, 32, -1,
17, 18, 34, 33, -1,
18, 19, 35, 34, -1,
19, 20, 36, 35, -1,
20, 21, 37, 36, -1,
21, 22, 38, 37, -1,
22, 23, 39, 38, -1,
24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, -1,
40, 41, 43, 42, -1,
40, 42, 47, 45, -1,
40, 45, 44, 41, -1,
41, 44, 46, 43, -1,
42, 43, 46, 47, -1,
44, 45, 49, 48, -1,
44, 48, 51, 46, -1,
45, 47, 50, 49, -1,
46, 51, 50, 47, -1,
48, 49, 50, 51, -1 ]
normal Normal { vector [
-0.577350 -0.577350 -0.577350,
-0.577350 0.577350 -0.577350,
-0.577350 0.577350 0.577350,
-0.577350 -0.577350 0.577350,
0.577350 -0.577350 -0.577350,
0.577350 0.577350 -0.577350,
0.577350 0.577350 0.577350,
0.577350 -0.577350 0.577350,
-1.26061e-17 0.890909 -0.454182,
-0.340936 0.823093 -0.454182,
-0.629968 0.629968 -0.454182,
-0.823093 0.340936 -0.454182,
-0.890909 0.00000e+0 -0.454182,
-0.823093 -0.340936 -0.454182,
-0.629968 -0.629968 -0.454182,
-0.340936 -0.823093 -0.454182,
-1.26061e-17 -0.890909 -0.454182,
0.340936 -0.823093 -0.454182,
0.629968 -0.629968 -0.454182,
0.823093 -0.340936 -0.454182,
0.890909 -2.52121e-16 -0.454182,
0.823093 0.340936 -0.454182,
0.629968 0.629968 -0.454182,
0.340936 0.823093 -0.454182,
-5.04243e-17 0.890909 0.454182,
-0.340936 0.823093 0.454182,
-0.629968 0.629968 0.454182,
-0.823093 0.340936 0.454182,
-0.890909 0.00000e+0 0.454182,
-0.823093 -0.340936 0.454182,
-0.629968 -0.629968 0.454182,
-0.340936 -0.823093 0.454182,
-5.04243e-17 -0.890909 0.454182,
0.340936 -0.823093 0.454182,
0.629968 -0.629968 0.454182,
0.823093 -0.340936 0.454182,
0.890909 -2.52121e-16 0.454182,
0.823093 0.340936 0.454182,
0.629968 0.629968 0.454182,
0.340936 0.823093 0.454182,
-0.577350 -0.577350 -0.577350,
-0.577350 0.577350 -0.577350,
0.577350 -0.577350 -0.577350,
0.577350 0.577350 -0.577350,
-0.610132 0.610132 0.505449,
-0.610132 -0.610132 0.505449,
0.610131 0.610132 0.505449,
0.610131 -0.610132 0.505449,
-0.270598 0.270598 0.923879,
-0.270598 -0.270598 0.923879,
0.270598 -0.270598 0.923880,
0.270598 0.270598 0.923880 ] }
normalIndex [
0, 1, 5, 4, -1,
0, 3, 2, 1, -1,
0, 4, 7, 3, -1,
1, 2, 6, 5, -1,
2, 3, 7, 6, -1,
4, 5, 6, 7, -1,
8, 9, 25, 24, -1,
8, 23, 22, 21, 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, 10, 9, -1,
8, 24, 39, 23, -1,
9, 10, 26, 25, -1,
10, 11, 27, 26, -1,
11, 12, 28, 27, -1,
12, 13, 29, 28, -1,
13, 14, 30, 29, -1,
14, 15, 31, 30, -1,
15, 16, 32, 31, -1,
16, 17, 33, 32, -1,
17, 18, 34, 33, -1,
18, 19, 35, 34, -1,
19, 20, 36, 35, -1,
20, 21, 37, 36, -1,
21, 22, 38, 37, -1,
22, 23, 39, 38, -1,
24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, -1,
40, 41, 43, 42, -1,
40, 42, 47, 45, -1,
40, 45, 44, 41, -1,
41, 44, 46, 43, -1,
42, 43, 46, 47, -1,
44, 45, 49, 48, -1,
44, 48, 51, 46, -1,
45, 47, 50, 49, -1,
46, 51, 50, 47, -1,
48, 49, 50, 51, -1 ]
}
}
]
}

View File

@ -1,43 +0,0 @@
OUTPUT_FILE=P8000_WDC_Emulator
MCU= -mmcu=atmega1284p
CC=avr-gcc
CFLAGS= -I/usr/local/avr/include -funsigned-char -funsigned-bitfields \
-O1 -ffunction-sections -fpack-struct -fshort-enums -Wall \
-Wundef -Werror -pedantic -pedantic-errors ${MCU}
LDFLAGS=-Wl,-Map="${OUTPUT_FILE}.map" -Wl,--start-group -Wl,-lm \
-Wl,--end-group -Wl,--gc-sections ${MCU}
RM := rm -rf
OBJS += \
wdc_avr.o \
wdc_drv_pata.o \
wdc_main.o \
wdc_drv_mmc.o \
wdc_if_disk_perf.o \
uart.o \
wdc_if_p8000.o \
wdc_if_disk.o \
wdc_par.o \
wdc_ram.o
all: ${OUTPUT_FILE}
${OUTPUT_FILE}: ${OBJS}
avr-gcc -o${OUTPUT_FILE}.elf ${OBJS} ${LDFLAGS}
avr-objcopy -O ihex -R .eeprom -R .fuse -R .lock -R .signature "${OUTPUT_FILE}.elf" "${OUTPUT_FILE}.hex"
avr-objcopy -j .eeprom --set-section-flags=.eeprom=alloc,load --change-section-lma .eeprom=0 --no-change-warnings -O ihex "${OUTPUT_FILE}.elf" "${OUTPUT_FILE}.eep" || exit 0
avr-objdump -h -S "${OUTPUT_FILE}.elf" > "${OUTPUT_FILE}.lss"
avr-objcopy -O srec -R .eeprom -R .fuse -R .lock -R .signature "${OUTPUT_FILE}.elf" "${OUTPUT_FILE}.srec"
avr-size "${OUTPUT_FILE}.elf"
clean:
-${RM} ${OBJS}
rm -rf "${OUTPUT_FILE}.elf" "${OUTPUT_FILE}.a" "${OUTPUT_FILE}.hex" "${OUTPUT_FILE}.lss" "${OUTPUT_FILE}.eep" "${OUTPUT_FILE}.map" "${OUTPUT_FILE}.srec"
format:
for file in *.h *.c ; do \
uncrustify -l C -c ../uncrustify.cfg --no-backup $$file ;\
done

View File

@ -1,153 +0,0 @@
<?xml version="1.0" encoding="utf-8"?>
<Project DefaultTargets="Build" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
<PropertyGroup>
<SchemaVersion>2.0</SchemaVersion>
<ProjectVersion>6.1</ProjectVersion>
<ToolchainName>com.Atmel.AVRGCC8.C</ToolchainName>
<ProjectGuid>{257c9a83-a686-455c-ac90-d649b30aa14d}</ProjectGuid>
<avrdevice>ATmega1284P</avrdevice>
<avrdeviceseries>none</avrdeviceseries>
<OutputType>Executable</OutputType>
<Language>C</Language>
<OutputFileName>$(MSBuildProjectName)</OutputFileName>
<OutputFileExtension>.elf</OutputFileExtension>
<OutputDirectory>$(MSBuildProjectDirectory)\$(Configuration)</OutputDirectory>
<AssemblyName>P8000_WDC_Emulator</AssemblyName>
<Name>P8000_WDC_Emulator</Name>
<RootNamespace>P8000_WDC_Emulator</RootNamespace>
<ToolchainFlavour>Native</ToolchainFlavour>
<KeepTimersRunning>true</KeepTimersRunning>
<OverrideVtor>false</OverrideVtor>
<OverrideVtorValue />
<eraseonlaunchrule>0</eraseonlaunchrule>
<AsfVersion>2.11.1</AsfVersion>
<AsfFrameworkConfig>
<framework-data>
<options />
<configurations />
<files />
<documentation help="" />
<offline-documentation help="" />
<dependencies>
<content-extension eid="atmel.asf" uuidref="Atmel.ASF" version="3.3.0" />
</dependencies>
</framework-data>
</AsfFrameworkConfig>
<ProgFlashFromRam>true</ProgFlashFromRam>
<RamSnippetAddress>0x20000000</RamSnippetAddress>
<CacheFlash>true</CacheFlash>
<UncachedRange />
<BootSegment>2</BootSegment>
</PropertyGroup>
<PropertyGroup Condition=" '$(Configuration)' == 'Release' ">
<ToolchainSettings>
<AvrGcc xmlns="">
<avrgcc.common.outputfiles.hex>True</avrgcc.common.outputfiles.hex>
<avrgcc.common.outputfiles.lss>True</avrgcc.common.outputfiles.lss>
<avrgcc.common.outputfiles.eep>True</avrgcc.common.outputfiles.eep>
<avrgcc.common.outputfiles.srec>True</avrgcc.common.outputfiles.srec>
<avrgcc.compiler.general.ChangeDefaultCharTypeUnsigned>True</avrgcc.compiler.general.ChangeDefaultCharTypeUnsigned>
<avrgcc.compiler.general.ChangeDefaultBitFieldUnsigned>True</avrgcc.compiler.general.ChangeDefaultBitFieldUnsigned>
<avrgcc.compiler.optimization.level>Optimize for size (-Os)</avrgcc.compiler.optimization.level>
<avrgcc.compiler.optimization.PackStructureMembers>True</avrgcc.compiler.optimization.PackStructureMembers>
<avrgcc.compiler.optimization.AllocateBytesNeededForEnum>True</avrgcc.compiler.optimization.AllocateBytesNeededForEnum>
<avrgcc.compiler.warnings.AllWarnings>True</avrgcc.compiler.warnings.AllWarnings>
<avrgcc.linker.libraries.Libraries>
<ListValues>
<Value>libm</Value>
</ListValues>
</avrgcc.linker.libraries.Libraries>
</AvrGcc>
</ToolchainSettings>
</PropertyGroup>
<PropertyGroup Condition=" '$(Configuration)' == 'Debug' ">
<ToolchainSettings>
<AvrGcc xmlns="">
<avrgcc.common.outputfiles.hex>True</avrgcc.common.outputfiles.hex>
<avrgcc.common.outputfiles.lss>True</avrgcc.common.outputfiles.lss>
<avrgcc.common.outputfiles.eep>True</avrgcc.common.outputfiles.eep>
<avrgcc.common.outputfiles.srec>True</avrgcc.common.outputfiles.srec>
<avrgcc.compiler.general.ChangeDefaultCharTypeUnsigned>True</avrgcc.compiler.general.ChangeDefaultCharTypeUnsigned>
<avrgcc.compiler.general.ChangeDefaultBitFieldUnsigned>True</avrgcc.compiler.general.ChangeDefaultBitFieldUnsigned>
<avrgcc.compiler.optimization.level>Optimize (-O1)</avrgcc.compiler.optimization.level>
<avrgcc.compiler.optimization.PackStructureMembers>True</avrgcc.compiler.optimization.PackStructureMembers>
<avrgcc.compiler.optimization.AllocateBytesNeededForEnum>True</avrgcc.compiler.optimization.AllocateBytesNeededForEnum>
<avrgcc.compiler.warnings.AllWarnings>True</avrgcc.compiler.warnings.AllWarnings>
<avrgcc.compiler.warnings.Undefined>True</avrgcc.compiler.warnings.Undefined>
<avrgcc.compiler.warnings.WarningsAsErrors>True</avrgcc.compiler.warnings.WarningsAsErrors>
<avrgcc.compiler.warnings.Pedantic>True</avrgcc.compiler.warnings.Pedantic>
<avrgcc.compiler.warnings.PedanticWarningsAsErrors>True</avrgcc.compiler.warnings.PedanticWarningsAsErrors>
<avrgcc.compiler.miscellaneous.OtherFlags />
<avrgcc.compiler.miscellaneous.DoNotDeleteTemporaryFiles>True</avrgcc.compiler.miscellaneous.DoNotDeleteTemporaryFiles>
<avrgcc.linker.libraries.Libraries>
<ListValues>
<Value>libm</Value>
</ListValues>
</avrgcc.linker.libraries.Libraries>
</AvrGcc>
</ToolchainSettings>
</PropertyGroup>
<ItemGroup>
<Compile Include="wdc_config.h">
<SubType>compile</SubType>
</Compile>
<Compile Include="wdc_avr.c">
<SubType>compile</SubType>
</Compile>
<Compile Include="wdc_avr.h">
<SubType>compile</SubType>
</Compile>
<Compile Include="wdc_drv_pata.c">
<SubType>compile</SubType>
</Compile>
<Compile Include="wdc_drv_pata.h">
<SubType>compile</SubType>
</Compile>
<Compile Include="wdc_main.c">
<SubType>compile</SubType>
</Compile>
<Compile Include="wdc_main.h">
<SubType>compile</SubType>
</Compile>
<Compile Include="wdc_drv_mmc.c">
<SubType>compile</SubType>
</Compile>
<Compile Include="wdc_drv_mmc.h">
<SubType>compile</SubType>
</Compile>
<Compile Include="wdc_if_disk_perf.c">
<SubType>compile</SubType>
</Compile>
<Compile Include="uart.c">
<SubType>compile</SubType>
</Compile>
<Compile Include="uart.h">
<SubType>compile</SubType>
</Compile>
<Compile Include="wdc_if_p8000.c">
<SubType>compile</SubType>
</Compile>
<Compile Include="wdc_if_p8000.h">
<SubType>compile</SubType>
</Compile>
<Compile Include="wdc_if_disk.c">
<SubType>compile</SubType>
</Compile>
<Compile Include="wdc_if_disk.h">
<SubType>compile</SubType>
</Compile>
<Compile Include="wdc_par.c">
<SubType>compile</SubType>
</Compile>
<Compile Include="wdc_par.h">
<SubType>compile</SubType>
</Compile>
<Compile Include="wdc_ram.c">
<SubType>compile</SubType>
</Compile>
<Compile Include="wdc_ram.h">
<SubType>compile</SubType>
</Compile>
</ItemGroup>
<Import Project="$(AVRSTUDIO_EXE_PATH)\\Vs\\Compiler.targets" />
</Project>

View File

@ -1,145 +0,0 @@
/*-
* Copyright (c) 2013 Oliver Lehmann
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer
* in this position and unchanged.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/*
* $Id: uart.c,v 1.6 2013/05/04 15:40:14 olivleh1 Exp $
*/
#include <stdio.h>
#include <avr/interrupt.h>
#include <avr/io.h>
#include <avr/sfr_defs.h>
#include <avr/sleep.h>
#include "uart.h"
#include "wdc_config.h"
/* Define baud rate */
#define BAUD 9600UL
#define UBBR_VALUE (( F_CPU / ( BAUD * 16 )) - 1 )
void uart_init ()
{
/* Set baud rate */
UBRR0H = (uint8_t)( UBBR_VALUE >> 8 );
UBRR0L = (uint8_t)UBBR_VALUE;
/* Set frame format to 8 data bits, no parity, 1 stop bit */
UCSR0C = ( 0 << USBS0 ) | ( 1 << UCSZ01 ) | ( 1 << UCSZ00 );
/* Enable receiver and transmitter */
UCSR0B = ( 1 << RXEN0 ) | ( 1 << TXEN0 );
}
void uart_putc ( uint8_t data )
{
/* Wait if a byte is being transmitted */
while ( ( UCSR0A & ( 1 << UDRE0 ) ) == 0 ) {}
/* Transmit data */
UDR0 = data;
}
void uart_putc_hex ( uint8_t b )
{
/* upper nibble */
if ( ( b >> 4 ) < 0x0a ) {
uart_putc ( ( b >> 4 ) + '0' );
} else {
uart_putc ( ( b >> 4 ) - 0x0a + 'a' );
}
/* lower nibble */
if ( ( b & 0x0f ) < 0x0a ) {
uart_putc ( ( b & 0x0f ) + '0' );
} else {
uart_putc ( ( b & 0x0f ) - 0x0a + 'a' );
}
}
void uart_putw_dec ( uint16_t w )
{
uint16_t num = 10000;
uint8_t started = 0;
while ( num > 0 ) {
uint8_t b = w / num;
if ( b > 0 || started || num == 1 ) {
uart_putc ( '0' + b );
started = 1;
}
w -= b * num;
num /= 10;
}
}
void uart_putdw_dec ( uint32_t dw )
{
uint32_t num = 1000000000;
uint8_t started = 0;
while ( num > 0 ) {
uint8_t b = dw / num;
if ( b > 0 || started || num == 1 ) {
uart_putc ( '0' + b );
started = 1;
}
dw -= b * num;
num /= 10;
}
}
void uart_put_nl ()
{
uart_putc ( '\n' );
uart_putc ( '\r' );
}
void uart_putstring ( PGM_P str, bool newline )
{
uint8_t i = 0;
while ( 1 ) {
char c = pgm_read_byte ( &str[i] );
if ( c != '\0' ) {
uart_putc ( c );
i++;
} else {
break;
}
}
if ( newline ) {
uart_put_nl();
}
}
EMPTY_INTERRUPT ( USART0_RX_vect )

View File

@ -1,62 +0,0 @@
/*-
* Copyright (c) 2013 Oliver Lehmann
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer
* in this position and unchanged.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/*
* $Id: uart.h,v 1.2 2013/05/04 15:40:14 olivleh1 Exp $
*/
#ifndef UART_H
#define UART_H
#include <stdint.h>
#include <stdbool.h>
#include <avr/pgmspace.h>
#ifdef __cplusplus
extern "C"
{
#endif
void uart_init ();
void uart_putc ( uint8_t c );
void uart_putc_hex ( uint8_t b );
void uart_putw_dec ( uint16_t w );
void uart_putdw_dec ( uint32_t dw );
void uart_puts ( const char *str );
void uart_putstring ( PGM_P str, bool newline );
void uart_put_nl ();
#ifdef __cplusplus
}
#endif
#endif

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/*-
* Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer
* in this position and unchanged.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/*
* $Id: wdc_avr.c,v 1.6 2013/05/04 15:40:14 olivleh1 Exp $
*/
#include <avr/io.h>
#include "wdc_config.h"
#include "wdc_avr.h"
#include "wdc_drv_mmc.h"
#include "wdc_drv_pata.h"
#include "wdc_if_disk.h"
void wdc_init_avr ()
{
/* configure the P8000 interface */
configure_pin_status0();
configure_pin_status1();
configure_pin_status2();
configure_pin_te();
configure_pin_wdardy();
configure_pin_tr();
configure_pin_reset();
configure_port_data_read();
/* configure the address decoder */
configure_pin_addr0();
configure_pin_addr1();
configure_pin_addr2();
init_addressdecoder();
/* configure the MMC interface */
configure_pin_miso();
configure_pin_sck();
configure_pin_mosi();
configure_pin_mmc_cs();
/* configure the ATA interface */
configure_ata_wr();
configure_ata_rd();
configure_ata_cs0();
configure_ata_cs1();
configure_ata_da0();
configure_ata_da1();
configure_ata_da2();
ata_wr_disable();
ata_rd_disable();
ata_cs0_disable();
ata_cs1_disable();
ata_da0_disable();
ata_da1_disable();
ata_da2_disable();
}
void wdc_get_sysconf ()
{
enable_sysconf();
nop();
nop();
if ( jumper_pata_set() ) {
drv_init = pata_init;
drv_read_block = pata_read_block;
drv_write_block = pata_write_block;
drv_read_multiblock = pata_read_multiblock;
drv_write_multiblock = pata_write_multiblock;
} else {
drv_init = mmc_init;
drv_read_block = mmc_read_sector;
drv_write_block = mmc_write_sector;
drv_read_multiblock = mmc_read_multiblock;
drv_write_multiblock = mmc_write_multiblock;
}
disable_sysconf();
}

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/*-
* Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer
* in this position and unchanged.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/*
* $Id: wdc_avr.h,v 1.7 2013/05/04 15:40:14 olivleh1 Exp $
*/
#ifndef WDC_AVR_H_
#define WDC_AVR_H_
#define configure_port_data_read() DDR_DATA = 0x00 /* programs the DATA-Port as Input-only for reading from the P8000*/
#define configure_port_data_write() DDR_DATA = 0xff /* programs the DATA-Port as Out-only for writing to the P8000*/
#define configure_pin_status0() DDR_INFO |= ( 1 << PIN_INFO_STATUS0 )
#define configure_pin_status1() DDR_INFO |= ( 1 << PIN_INFO_STATUS1 )
#define configure_pin_status2() DDR_INFO |= ( 1 << PIN_INFO_STATUS2 )
#define configure_pin_te() DDR_INFO &= ~( 1 << PIN_INFO_TE )
#define configure_pin_wdardy() DDR_INFO &= ~( 1 << PIN_INFO_WDARDY )
#define configure_pin_tr() DDR_INFO |= ( 1 << PIN_INFO_TR )
#define configure_pin_reset() DDR_INFO &= ~( 1 << PIN_INFO_RST ); PORT_INFO |= ( 1 << PIN_INFO_RST )
#define port_data_set( x ) ( PORT_DATA = ( x ) )
#define port_info_set( x ) ( PORT_INFO = ( x ) )
#define port_data_get() PIN_DATA
#define port_info_get() PIN_INFO
/* functions dealing with the 74138 address decoder */
#define configure_pin_addr0() DDR_ADRDEC |= ( 1 << PIN_ADRDEC_ADDR0 )
#define configure_pin_addr1() DDR_ADRDEC |= ( 1 << PIN_ADRDEC_ADDR1 )
#define configure_pin_addr2() DDR_ADRDEC |= ( 1 << PIN_ADRDEC_ADDR2 )
#define init_addressdecoder() PORT_ADRDEC &= ~( ( 1 << PIN_ADRDEC_ADDR0 ) | ( 1 << PIN_ADRDEC_ADDR1 ) | ( 1 << PIN_ADRDEC_ADDR2 ) )
#define enable_p8000com() PORT_ADRDEC |= ( 1 << PIN_ADRDEC_ADDR0 )
#define disable_p8000com() PORT_ADRDEC &= ~( 1 << PIN_ADRDEC_ADDR0 )
#define enable_rdwrtoata() PORT_ADRDEC |= ( 1 << PIN_ADRDEC_ADDR1 )
#define disable_rdwrtoata() PORT_ADRDEC &= ~( 1 << PIN_ADRDEC_ADDR1 )
#define enable_atalatch() PORT_ADRDEC |= ( ( 1 << PIN_ADRDEC_ADDR0 ) | ( 1 << PIN_ADRDEC_ADDR1 ))
#define disable_atalatch() PORT_ADRDEC &= ~( ( 1 << PIN_ADRDEC_ADDR0 ) | ( 1 << PIN_ADRDEC_ADDR1 ))
#define enable_sysconf() PORT_ADRDEC |= ( ( 1 << PIN_ADRDEC_ADDR0 ) | ( 1 << PIN_ADRDEC_ADDR1 ) | ( 1 << PIN_ADRDEC_ADDR2 ) )
#define disable_sysconf() PORT_ADRDEC &= ~( ( 1 << PIN_ADRDEC_ADDR0 ) | ( 1 << PIN_ADRDEC_ADDR1 ) | ( 1 << PIN_ADRDEC_ADDR2 ) )
/* functions dealing with the MMC interface */
#define configure_pin_miso() DDR_MMC &= ~( 1 << PIN_MMC_MISO )
#define configure_pin_sck() DDR_MMC |= ( 1 << PIN_MMC_SCK )
#define configure_pin_mosi() DDR_MMC |= ( 1 << PIN_MMC_MOSI )
#define configure_pin_mmc_cs() DDR_MMC |= ( 1 << PIN_MMC_CS )
#define disable_mmc() PORT_MMC |= ( 1 << PIN_MMC_CS );
#define enable_mmc() PORT_MMC &= ~( 1 << PIN_MMC_CS );
/* functions dealing with the sysconf jumperpad */
#define jumper_pata_set() ~port_data_get() & ( 1 << PIN_DATA_D0 )
#define jumper_nn2_set() ~port_data_get() & ( 1 << PIN_DATA_D1 )
#define jumper_nn3_set() ~port_data_get() & ( 1 << PIN_DATA_D2 )
#define jumper_nn4_set() ~port_data_get() & ( 1 << PIN_DATA_D3 )
/* functions dealing with the ATA interface */
#define configure_ata_wr() DDR_ATARDWR |= ( 1 << PIN_ATARDWR_WR )
#define configure_ata_rd() DDR_ATARDWR |= ( 1 << PIN_ATARDWR_RD )
#define configure_ata_cs0() DDR_ATACS |= ( 1 << PIN_ATACS_CS0 )
#define configure_ata_cs1() DDR_ATACS |= ( 1 << PIN_ATACS_CS1 )
#define configure_ata_da0() DDR_ATADA |= ( 1 << PIN_ATADA_DA0 )
#define configure_ata_da1() DDR_ATADA |= ( 1 << PIN_ATADA_DA1 )
#define configure_ata_da2() DDR_ATADA |= ( 1 << PIN_ATADA_DA2 )
#define ata_wr_disable() PORT_ATARDWR |= ( 1 << PIN_ATARDWR_WR )
#define ata_wr_enable() PORT_ATARDWR &= ~( 1 << PIN_ATARDWR_WR )
#define ata_rd_disable() PORT_ATARDWR |= ( 1 << PIN_ATARDWR_RD )
#define ata_rd_enable() PORT_ATARDWR &= ~( 1 << PIN_ATARDWR_RD )
#define ata_cs0_disable() PORT_ATACS |= ( 1 << PIN_ATACS_CS0 )
#define ata_cs0_enable() PORT_ATACS &= ~( 1 << PIN_ATACS_CS0 )
#define ata_cs1_disable() PORT_ATACS |= ( 1 << PIN_ATACS_CS1 )
#define ata_cs1_enable() PORT_ATACS &= ~( 1 << PIN_ATACS_CS1 )
#define ata_da0_disable() PORT_ATADA |= ( 1 << PIN_ATADA_DA0 )
#define ata_da0_enable() PORT_ATADA &= ~( 1 << PIN_ATADA_DA0 )
#define ata_da1_disable() PORT_ATADA |= ( 1 << PIN_ATADA_DA1 )
#define ata_da1_enable() PORT_ATADA &= ~( 1 << PIN_ATADA_DA1 )
#define ata_da2_disable() PORT_ATADA |= ( 1 << PIN_ATADA_DA2 )
#define ata_da2_enable() PORT_ATADA &= ~( 1 << PIN_ATADA_DA2 )
extern void wdc_init_avr ();
extern void wdc_get_sysconf ();
#endif /* WDC_AVR_H_ */

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/*-
* Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer
* in this position and unchanged.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/*
* $Id: wdc_config.h,v 1.22 2013/05/04 15:40:14 olivleh1 Exp $
*/
#ifndef CONFIG_H_
#define CONFIG_H_
#define F_CPU 18432000UL
/*
* P8000 Interface
*/
#define PORT_DATA PORTA
#define PIN_DATA PINA
#define DDR_DATA DDRA
#define PORT_INFO PORTC
#define PIN_INFO PINC
#define DDR_INFO DDRC
#define PORT_ADRDEC PORTD
#define PIN_ADRDEC PIND
#define DDR_ADRDEC DDRD
#define PIN_DATA_D0 PINA0
#define PIN_DATA_D1 PINA1
#define PIN_DATA_D2 PINA2
#define PIN_DATA_D3 PINA3
#define PIN_DATA_D4 PINA4
#define PIN_DATA_D5 PINA5
#define PIN_DATA_D6 PINA6
#define PIN_DATA_D7 PINA7
#define PIN_INFO_STATUS0 PINC0
#define PIN_INFO_STATUS1 PINC1
#define PIN_INFO_STATUS2 PINC2
#define PIN_INFO_TE PINC4
#define PIN_INFO_WDARDY PINC5
#define PIN_INFO_TR PINC6
#define PIN_INFO_RST PINC7
#define PIN_ADRDEC_ADDR0 PIND5
#define PIN_ADRDEC_ADDR1 PIND6
#define PIN_ADRDEC_ADDR2 PIND7
/*
* SD-Card Interface
*/
#define PORT_MMC PORTB
#define PIN_MMC PINB
#define DDR_MMC DDRB
#define PIN_MMC_CS PINB4 /* AVR Port where the MMC Card /CS signal is connected to */
#define PIN_MMC_MOSI PINB5 /* AVR Port: MOSI / MMC Card: Data-In */
#define PIN_MMC_MISO PINB6 /* AVR Port: MISO / MMC Card: Data-Out */
#define PIN_MMC_SCK PINB7 /* AVR Port: SCk / MMC Card: CLK */
/*
* ATA Interface
*/
#define PORT_ATARDWR PORTB
#define PIN_ATARDWR PINB
#define DDR_ATARDWR DDRB
#define PORT_ATACS PORTB
#define PIN_ATACS PINB
#define DDR_ATACS DDRB
#define PORT_ATADA PORTD
#define PIN_ATADA PIND
#define DDR_ATADA DDRD
#define PIN_ATARDWR_WR PINB2
#define PIN_ATARDWR_RD PINB3
#define PIN_ATACS_CS0 PINB0
#define PIN_ATACS_CS1 PINB1
#define PIN_ATADA_DA0 PIND2
#define PIN_ATADA_DA1 PIND4
#define PIN_ATADA_DA2 PIND3
/*
* maximum performance with both turned off
*
*
* #define MMC_PRESET_MULTIBLOCKCOUNT 1
* #define SPI_CRC 1
*/
#define MMC_MULTIBLOCK 1
#define MEASURE_DISK_PERFORMANCE 1
#undef MEASURE_DISK_PERFORMANCE
#define DEBUG 1
#define nop() __asm__ __volatile__ ( "nop" ::)
#endif /* CONFIG_H_ */

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/*-
* Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer
* in this position and unchanged.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/*
* $Id: wdc_drv_mmc.c,v 1.25 2013/05/09 00:16:04 olivleh1 Exp $
*/
#include <avr/io.h>
#include "wdc_config.h"
#include "wdc_avr.h"
#include "wdc_drv_mmc.h"
#include "uart.h"
#define wait_till_send_done() while ( !( SPSR & ( 1 << SPIF ) ) )
#define wait_till_card_ready() do { send_dummy_byte(); } while ( !recv_byte() )
#define send_dummy_byte() SPDR = 0xFF; wait_till_send_done()
#define recv_byte() SPDR
#define xmit_byte( x ) SPDR = x
#define CMD0 ( 0x40 + 0 )
#define CMD1 ( 0x40 + 1 )
#define CMD8 ( 0x40 + 8 )
#define CMD12 ( 0x40 + 12 )
#define CMD17 ( 0x40 + 17 )
#define CMD18 ( 0x40 + 18 )
#define CMD23 ( 0x40 + 23 )
#define CMD24 ( 0x40 + 24 )
#define CMD25 ( 0x40 + 25 )
#define CMD55 ( 0x40 + 55 )
#define CMD59 ( 0x40 + 59 )
#define SB_START 0xFE
#define MB_START 0xFC
#define MB_STOP 0xFD
uint8_t mmc_read_block ( uint8_t *, uint8_t *, uint16_t );
uint8_t mmc_cmd ( uint8_t * );
uint8_t is_sdhc = 0;
typedef union {
uint32_t value32;
struct {
uint8_t ll;
uint8_t lh;
uint8_t hl;
uint8_t hh;
} value8;
} sint32;
#ifdef SPI_CRC
const uint16_t crc16_table[256] = {
0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef,
0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6,
0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de,
0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485,
0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d,
0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4,
0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc,
0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823,
0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b,
0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12,
0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a,
0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41,
0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49,
0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70,
0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78,
0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f,
0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067,
0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e,
0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256,
0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d,
0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c,
0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634,
0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab,
0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3,
0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a,
0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92,
0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9,
0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1,
0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
};
const uint8_t crc7_table[256] = {
0x00, 0x09, 0x12, 0x1b, 0x24, 0x2d, 0x36, 0x3f,
0x48, 0x41, 0x5a, 0x53, 0x6c, 0x65, 0x7e, 0x77,
0x19, 0x10, 0x0b, 0x02, 0x3d, 0x34, 0x2f, 0x26,
0x51, 0x58, 0x43, 0x4a, 0x75, 0x7c, 0x67, 0x6e,
0x32, 0x3b, 0x20, 0x29, 0x16, 0x1f, 0x04, 0x0d,
0x7a, 0x73, 0x68, 0x61, 0x5e, 0x57, 0x4c, 0x45,
0x2b, 0x22, 0x39, 0x30, 0x0f, 0x06, 0x1d, 0x14,
0x63, 0x6a, 0x71, 0x78, 0x47, 0x4e, 0x55, 0x5c,
0x64, 0x6d, 0x76, 0x7f, 0x40, 0x49, 0x52, 0x5b,
0x2c, 0x25, 0x3e, 0x37, 0x08, 0x01, 0x1a, 0x13,
0x7d, 0x74, 0x6f, 0x66, 0x59, 0x50, 0x4b, 0x42,
0x35, 0x3c, 0x27, 0x2e, 0x11, 0x18, 0x03, 0x0a,
0x56, 0x5f, 0x44, 0x4d, 0x72, 0x7b, 0x60, 0x69,
0x1e, 0x17, 0x0c, 0x05, 0x3a, 0x33, 0x28, 0x21,
0x4f, 0x46, 0x5d, 0x54, 0x6b, 0x62, 0x79, 0x70,
0x07, 0x0e, 0x15, 0x1c, 0x23, 0x2a, 0x31, 0x38,
0x41, 0x48, 0x53, 0x5a, 0x65, 0x6c, 0x77, 0x7e,
0x09, 0x00, 0x1b, 0x12, 0x2d, 0x24, 0x3f, 0x36,
0x58, 0x51, 0x4a, 0x43, 0x7c, 0x75, 0x6e, 0x67,
0x10, 0x19, 0x02, 0x0b, 0x34, 0x3d, 0x26, 0x2f,
0x73, 0x7a, 0x61, 0x68, 0x57, 0x5e, 0x45, 0x4c,
0x3b, 0x32, 0x29, 0x20, 0x1f, 0x16, 0x0d, 0x04,
0x6a, 0x63, 0x78, 0x71, 0x4e, 0x47, 0x5c, 0x55,
0x22, 0x2b, 0x30, 0x39, 0x06, 0x0f, 0x14, 0x1d,
0x25, 0x2c, 0x37, 0x3e, 0x01, 0x08, 0x13, 0x1a,
0x6d, 0x64, 0x7f, 0x76, 0x49, 0x40, 0x5b, 0x52,
0x3c, 0x35, 0x2e, 0x27, 0x18, 0x11, 0x0a, 0x03,
0x74, 0x7d, 0x66, 0x6f, 0x50, 0x59, 0x42, 0x4b,
0x17, 0x1e, 0x05, 0x0c, 0x33, 0x3a, 0x21, 0x28,
0x5f, 0x56, 0x4d, 0x44, 0x7b, 0x72, 0x69, 0x60,
0x0e, 0x07, 0x1c, 0x15, 0x2a, 0x23, 0x38, 0x31,
0x46, 0x4f, 0x54, 0x5d, 0x62, 0x6b, 0x70, 0x79
};
uint8_t crc7 ( const uint8_t *buffer, uint8_t len )
{
uint8_t crc = 0x00;
while ( len-- ) {
crc = crc7_table[( crc << 1 ) ^ *buffer++];
}
return crc;
}
uint16_t crc16 ( const uint8_t *buffer, uint16_t len )
{
uint16_t crc = 0x0000;
while ( len-- ) {
crc = ( crc << 8 ) ^ crc16_table[( crc >> 8 ) ^ *buffer++];
}
return crc;
}
uint8_t mmc_enable_crc ( uint8_t on_off )
{
uint8_t cmd[] = { CMD59, 0x00, 0x00, 0x00, 0x00, 0xFF };
/* last bit enables or disables CRC mode */
cmd[4] = on_off & 0x01;
if ( mmc_cmd ( cmd ) != 0 ) {
return 1;
}
return 0;
}
#endif
uint8_t mmc_init ()
{
uint16_t t16 = 0;
uint8_t a;
uint8_t cmd[6];
uart_putstring ( PSTR ( "INFO: SDCard init start" ), true );
for ( a = 0; a < 200; a++ ) {
nop();
}
SPCR = ( 1 << SPE ) | ( 1 << MSTR ) | ( 1 << SPR0 ) | ( 1 << SPR1 ); /* Enable SPI, SPI in Master Mode */
SPSR = ( 0 << SPI2X );
disable_mmc();
for ( a = 0; a < 0x0f; a++ ) {
send_dummy_byte();
}
enable_mmc();
/*
* send CMD0
*/
cmd[0] = CMD0;
cmd[1] = 0x00;
cmd[2] = 0x00;
cmd[3] = 0x00;
cmd[4] = 0x00;
cmd[5] = 0x95;
while ( mmc_cmd ( cmd ) != 1 ) {
if ( t16++ > 1000 ) {
disable_mmc();
return 1;
}
}
send_dummy_byte();
cmd[0] = CMD8;
cmd[1] = 0x00;
cmd[2] = 0x00;
cmd[3] = 0x01;
cmd[4] = 0xaa;
cmd[5] = 0x86;
a = mmc_cmd ( cmd );
/* if SDHC Card */
if ( a <= 1 ) {
/* skip 6 bytes */
for ( a = 0; a < 6; a++ ) {
send_dummy_byte();
}
is_sdhc = 1;
/* prepare next cmd */
cmd[0] = CMD1;
cmd[1] = 0x40;
cmd[2] = cmd[3] = cmd[4] = 0x00;
cmd[5] = 0xFF;
} else {
send_dummy_byte();
is_sdhc = 0;
/* prepare next cmd */
cmd[0] = CMD1;
cmd[1] = cmd[2] = cmd[3] = cmd[4] = 0x00;
cmd[5] = 0xFF;
}
/*
* send CMD1
*/
t16 = 0;
while ( mmc_cmd ( cmd ) != 0 ) {
send_dummy_byte();
if ( t16++ > 1000 ) {
disable_mmc();
return 2;
}
}
send_dummy_byte();
/* SPI Bus to max. speed */
SPCR &= ~( ( 1 << SPR0 ) | ( 1 << SPR1 ) );
SPSR = SPSR | ( 1 << SPI2X );
#ifdef SPI_CRC
mmc_enable_crc ( 1 );
#endif
uart_putstring ( PSTR ( "INFO: SDCard disk has been found" ), true );
disable_mmc();
return 0;
}
uint8_t mmc_cmd ( uint8_t *cmd )
{
uint8_t tmp = 0x80;
uint8_t i = 10;
uint8_t cmd0 = cmd[0];
uint8_t a;
#ifdef SPI_CRC
/* Calculate CRC and framing bits */
cmd[0] = ( cmd[0] | ( 1 << 6 ) ) & 0x7F;
cmd[5] = crc7 ( cmd, 5 ) << 1;
#endif
/* send command */
for ( a = 0; a < 0x06; a++ ) {
xmit_byte ( *cmd++ );
wait_till_send_done();
}
/*
* The received byte immediataly following CMD12 is a stuff byte,
* it should be discarded before receive the response of the CMD12
*/
if ( cmd0 == ( CMD12 ) ) {
recv_byte();
}
do {
send_dummy_byte();
tmp = recv_byte();
} while ( ( tmp & 0x80 ) && --i );
return tmp;
}
uint8_t mmc_write_sector ( uint32_t addr, uint8_t *buffer )
{
sint32 x;
uint8_t tmp;
uint8_t cmd[] = { CMD24, 0x00, 0x00, 0x00, 0x00, 0xFF };
uint16_t i;
#ifdef SPI_CRC
uint16_t crc;
uint8_t crcl, crch;
#endif
enable_mmc();
wait_till_card_ready();
/* convert blocks to bytes */
if ( !is_sdhc ) {
addr = addr * MMC_BLOCKLEN;
}
x.value32 = addr;
cmd[1] = x.value8.hh;
cmd[2] = x.value8.hl;
cmd[3] = x.value8.lh;
cmd[4] = x.value8.ll;
/*
* send CMD24
*/
tmp = mmc_cmd ( cmd );
if ( tmp != 0 ) {
disable_mmc();
return tmp;
}
/* send Startbyte */
xmit_byte ( SB_START );
#ifdef SPI_CRC
crc = crc16 ( buffer, MMC_BLOCKLEN );
crch = crc >> 8;
crcl = crc & 0xff;
#endif
/* write a single block */
for ( i = MMC_BLOCKLEN; i; i-- ) {
uint8_t data = *buffer;
buffer++;
wait_till_send_done();
xmit_byte ( data );
}
wait_till_send_done();
/* handle CRC */
#ifdef SPI_CRC
xmit_byte ( crch );
wait_till_send_done();
xmit_byte ( crcl );
wait_till_send_done();
#else
send_dummy_byte();
send_dummy_byte();
#endif
/* check for errors */
send_dummy_byte();
if ( ( recv_byte() & 0x1F ) != 0x05 ) {
disable_mmc();
return 2;
}
disable_mmc();
return 0;
}
uint8_t mmc_read_block ( uint8_t *cmd, uint8_t *buffer, uint16_t bytes )
{
uint16_t i = 1;
uint8_t by;
#ifdef SPI_CRC
uint16_t crc;
#endif
enable_mmc();
wait_till_card_ready();
/* send command */
if ( mmc_cmd ( cmd ) != 0 ) {
disable_mmc();
return 1;
}
/* wait for startbyte */
while ( 1 ) {
send_dummy_byte();
if ( recv_byte() == SB_START ) {
break;
}
}
/* read first byte */
send_dummy_byte();
by = recv_byte();
xmit_byte ( 0xff );
/* read the remaining 511 bytes */
do {
*buffer++ = by;
i++;
wait_till_send_done();
by = recv_byte();
xmit_byte ( 0xff );
} while ( i < bytes );
*buffer = by;
/* handle CRC */
wait_till_send_done();
#ifdef SPI_CRC
crc = recv_byte() << 8;
xmit_byte ( 0xff );
buffer = buffer - ( bytes - 1 );
wait_till_send_done();
crc |= recv_byte();
if ( crc != crc16 ( buffer, bytes ) ) {
disable_mmc();
return 3;
}
#else
send_dummy_byte();
#endif
disable_mmc();
return 0;
}
uint8_t mmc_read_sector ( uint32_t addr, uint8_t *buffer )
{
sint32 x;
/*
* send CMD17
*/
uint8_t cmd[] = { CMD17, 0x00, 0x00, 0x00, 0x00, 0xFF };
/* convert blocks to bytes */
if ( !is_sdhc ) {
addr = addr * MMC_BLOCKLEN;
}
x.value32 = addr;
cmd[1] = x.value8.hh;
cmd[2] = x.value8.hl;
cmd[3] = x.value8.lh;
cmd[4] = x.value8.ll;
return mmc_read_block ( cmd, buffer, MMC_BLOCKLEN );
}
uint8_t mmc_read_multiblock ( uint32_t addr, uint8_t *buffer, uint8_t numblocks )
{
sint32 x;
uint8_t resp;
uint8_t cmd[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF };
uint8_t n = numblocks;
uint16_t i;
#ifdef SPI_CRC
uint16_t crc;
#endif
enable_mmc();
#ifdef MMC_MULTIBLOCK
#ifdef MMC_PRESET_MULTIBLOCKCOUNT
wait_till_card_ready();
/*
* send CMD55
*/
cmd[0] = CMD55;
mmc_cmd ( cmd );
/*
* send CMD23
*/
cmd[0] = CMD23;
cmd[4] = numblocks;
mmc_cmd ( cmd );
#endif
#endif
/* convert blocks to bytes */
if ( !is_sdhc ) {
addr = addr * MMC_BLOCKLEN;
}
x.value32 = addr;
#ifdef MMC_MULTIBLOCK
cmd[0] = CMD18;
cmd[1] = x.value8.hh;
cmd[2] = x.value8.hl;
cmd[3] = x.value8.lh;
cmd[4] = x.value8.ll;
wait_till_card_ready();
/*
* send CMD18
*/
resp = mmc_cmd ( cmd );
if ( resp > 1 ) {
disable_mmc();
return 1;
}
#else
cmd[0] = CMD17;
#endif
/* read the number of requested blocks */
do {
#ifndef MMC_MULTIBLOCK
cmd[1] = x.value8.hh;
cmd[2] = x.value8.hl;
cmd[3] = x.value8.lh;
cmd[4] = x.value8.ll;
/*
* send CMD17
*/
resp = mmc_cmd ( cmd );
if ( resp > 1 ) {
disable_mmc();
return 1;
}
x.value32 += MMC_BLOCKLEN;
#endif
n--;
i = MMC_BLOCKLEN - 1;
/* wait for startbyte */
while ( 1 ) {
send_dummy_byte();
if ( recv_byte() == SB_START ) {
break;
}
}
send_dummy_byte();
*buffer = recv_byte();
/* receive the block */
do {
xmit_byte ( 0xff );
buffer++;
i--;
wait_till_send_done();
*buffer = recv_byte();
} while ( i );
/* handle CRC */
#ifdef SPI_CRC
buffer = buffer - ( MMC_BLOCKLEN - 1 );
send_dummy_byte();
crc = recv_byte() << 8;
send_dummy_byte();
crc |= recv_byte();
if ( crc != crc16 ( buffer, MMC_BLOCKLEN ) ) {
disable_mmc();
return 3;
}
buffer = buffer + MMC_BLOCKLEN;
#else
send_dummy_byte();
send_dummy_byte();
buffer++;
#endif
} while ( n );
#ifdef MMC_MULTIBLOCK
wait_till_card_ready();
/*
* send CMD12
*/
cmd[0] = CMD12;
cmd[1] = cmd[2] = cmd[3] = cmd[4] = 0;
/*
* My Apacer SD-Card sends sometimes 0x7f as response to the CMD12 even if the write was
* successfull. Because of that, no checking of the response to CMD12 is done.
*/
mmc_cmd ( cmd );
/* Pad 8 */
send_dummy_byte();
#endif
disable_mmc();
return 0;
}
uint8_t mmc_write_multiblock ( uint32_t addr, uint8_t *buffer, uint8_t numblocks )
{
sint32 x;
uint8_t resp;
uint8_t cmd[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF };
uint8_t n = numblocks;
uint16_t i;
#ifdef SPI_CRC
uint16_t crc;
uint8_t crcl, crch;
#endif
enable_mmc();
wait_till_card_ready();
#ifdef MMC_MULTIBLOCK
#ifdef MMC_PRESET_MULTIBLOCKCOUNT
/*
* send CMD55
*/
cmd[0] = CMD55;
mmc_cmd ( cmd );
/*
* send CMD23
*/
cmd[0] = CMD23;
cmd[4] = numblocks;
mmc_cmd ( cmd );
wait_till_card_ready();
#endif
#endif
/* convert blocks to bytes */
if ( !is_sdhc ) {
addr = addr * MMC_BLOCKLEN;
}
x.value32 = addr;
#ifdef MMC_MULTIBLOCK
cmd[0] = CMD25;
cmd[1] = x.value8.hh;
cmd[2] = x.value8.hl;
cmd[3] = x.value8.lh;
cmd[4] = x.value8.ll;
/*
* send CMD25
*/
resp = mmc_cmd ( cmd );
if ( resp > 1 ) {
disable_mmc();
return 1;
}
#else
cmd[0] = CMD24;
#endif
do {
#ifndef MMC_MULTIBLOCK
cmd[1] = x.value8.hh;
cmd[2] = x.value8.hl;
cmd[3] = x.value8.lh;
cmd[4] = x.value8.ll;
/*
* send CMD24
*/
resp = mmc_cmd ( cmd );
if ( resp != 0 ) {
disable_mmc();
return resp;
}
x.value32 += MMC_BLOCKLEN;
#endif
#ifdef SPI_CRC
crc = crc16 ( buffer, MMC_BLOCKLEN );
crch = crc >> 8;
crcl = crc & 0xff;
#endif
#ifdef MMC_MULTIBLOCK
wait_till_card_ready();
/* Send multi-block start-token */
xmit_byte ( MB_START );
#else
/* send Startbyte */
xmit_byte ( SB_START );
#endif
/* actually transfer the data */
for ( i = MMC_BLOCKLEN; i; i-- ) {
uint8_t data = *buffer;
buffer++;
wait_till_send_done();
xmit_byte ( data );
}
n--;
wait_till_send_done();
/* handle CRC */
#ifdef SPI_CRC
xmit_byte ( crch );
wait_till_send_done();
xmit_byte ( crcl );
#else
xmit_byte ( 0xff );
wait_till_send_done();
xmit_byte ( 0xff );
#endif
#ifdef MMC_PRESET_MULTIBLOCKCOUNT
/* Pad 8 */
send_dummy_byte();
#else
wait_till_send_done();
#endif
send_dummy_byte();
if ( ( recv_byte() & 0x1F ) != 0x05 ) {
disable_mmc();
return 2;
}
#ifndef MMC_MULTIBLOCK
wait_till_card_ready();
#endif
} while ( n );
#ifdef MMC_MULTIBLOCK
wait_till_card_ready();
/* Send "transfer stop byte" */
xmit_byte ( MB_STOP );
wait_till_send_done();
/* Pad 8 */
send_dummy_byte();
#endif
disable_mmc();
return 0;
}

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@ -1,45 +0,0 @@
/*-
* Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer
* in this position and unchanged.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/*
* $Id: wdc_drv_mmc.h,v 1.10 2013/05/04 15:40:14 olivleh1 Exp $
*/
#ifndef WDC_DRV_MMC_H_
#define WDC_DRV_MMC_H_
extern uint8_t mmc_init ();
extern uint8_t mmc_read_sector ( uint32_t addr, uint8_t *buffer );
extern uint8_t mmc_write_sector ( uint32_t addr, uint8_t *buffer );
extern uint8_t mmc_read_multiblock ( uint32_t addr, uint8_t *buffer, uint8_t numblocks );
extern uint8_t mmc_write_multiblock ( uint32_t addr, uint8_t *buffer, uint8_t numblocks );
#define MMC_BLOCKLEN 512
#endif /* WDC_DRV_MMC_H_ */

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@ -1,459 +0,0 @@
/*-
* Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer
* in this position and unchanged.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/*
* $Id: wdc_drv_pata.c,v 1.14 2013/05/07 17:38:06 olivleh1 Exp $
*/
#include "wdc_config.h"
#include <avr/io.h>
#include "wdc_avr.h"
#include "uart.h"
#include "wdc_drv_pata.h"
uint8_t pata_bsy ();
uint8_t pata_rdy ();
uint8_t pata_drq ();
uint8_t pata_err ();
void ata_identify ();
void pata_set_highbyte ( uint8_t byte );
void pata_set_lowbyte ( uint8_t byte );
uint8_t pata_get_highbyte ();
uint8_t pata_get_lowbyte ();
void set_io_register ( uint8_t ioreg );
uint8_t read_io_register ( uint8_t ioreg );
void write_io_register ( uint8_t ioreg, uint8_t byte );
void pata_read_bytes ( uint8_t *buffer, uint16_t bytes );
/*
* +----- CS0
* |+---- CS1
* ||+--- DA0
* |||+-- DA1
* ||||+- DA2
* ||||| */
#define PATA_W_DEVICE_CONTROL_REGISTER 0x0B /* 0b10011 */
#define PATA_R_STATUS_REGISTER 0x0F /* 0b01111 */
#define PATA_R_ALTERNATE_STATUS_REGISTER 0x0B /* 0b10011 */
#define PATA_R_ERROR_REGISTER 0x0C /* 0b01100 */
#define PATA_W_FEATURE_REGISTER 0x0C /* 0b01100 */
#define PATA_W_COMMAND_REGISTER 0x0F /* 0b01111 */
#define PATA_RW_DATA_REGISTER 0x08 /* 0b01000 */
#define PATA_RW_SECTOR_COUNT_REGISTER 0x0A /* 0b01010 */
#define PATA_RW_SECTOR_NUMBER_REGISTER 0x0E /* 0b01110 */
#define PATA_RW_CYLINDER_LOW_REGISTER 0x09 /* 0b01001 */
#define PATA_RW_CYLINDER_HIGH_REGISTER 0x0D /* 0b01101 */
#define PATA_RW_DEVICE_HEAD_REGISTER 0x0B /* 0b01011 */
#define ata_ctl_high() ata_cs0_disable(); ata_cs1_disable(); ata_da0_disable(); ata_da1_disable(); ata_da2_disable();
/*
* Private functions
*/
uint8_t pata_rdy ()
{
return ( read_io_register ( PATA_R_STATUS_REGISTER ) & ATA_STAT_RDY ) ? 1 : 0;
}
uint8_t pata_bsy ()
{
return ( read_io_register ( PATA_R_STATUS_REGISTER ) & ATA_STAT_BSY ) ? 1 : 0;
}
uint8_t pata_drq ()
{
return ( read_io_register ( PATA_R_STATUS_REGISTER ) & ATA_STAT_DRQ ) ? 1 : 0;
}
uint8_t pata_err ()
{
return ( read_io_register ( PATA_R_STATUS_REGISTER ) & ATA_STAT_ERR ) ? 1 : 0;
}
void set_io_register ( uint8_t ioreg )
{
if ( !( ioreg & ( 1 << 0 ) ) ) {
ata_da2_enable();
}
if ( !( ioreg & ( 1 << 1 ) ) ) {
ata_da1_enable();
}
if ( !( ioreg & ( 1 << 2 ) ) ) {
ata_da0_enable();
}
if ( !( ioreg & ( 1 << 3 ) ) ) {
ata_cs1_enable();
}
if ( !( ioreg & ( 1 << 4 ) ) ) {
ata_cs0_enable();
}
}
void pata_set_lowbyte ( uint8_t byte )
{
port_data_set ( byte );
enable_rdwrtoata();
nop();
nop();
disable_rdwrtoata();
}
void pata_set_highbyte ( uint8_t byte )
{
port_data_set ( byte );
enable_atalatch();
nop();
nop();
disable_atalatch();
}
uint8_t pata_get_lowbyte ()
{
uint8_t byte;
enable_rdwrtoata();
nop();
nop();
nop();
byte = port_data_get();
disable_rdwrtoata();
return byte;
}
uint8_t pata_get_highbyte ()
{
uint8_t byte;
enable_atalatch();
nop();
nop();
byte = port_data_get();
disable_atalatch();
return byte;
}
uint8_t read_io_register ( uint8_t ioreg )
{
uint8_t byte;
configure_port_data_read();
set_io_register ( ioreg );
ata_rd_enable();
byte = pata_get_lowbyte();
ata_rd_disable();
ata_ctl_high();
return byte;
}
void write_io_register ( uint8_t ioreg, uint8_t byte )
{
configure_port_data_write();
set_io_register ( ioreg );
ata_wr_enable();
pata_set_lowbyte ( byte );
ata_wr_disable();
ata_ctl_high();
}
void pata_read_bytes ( uint8_t *buffer, uint16_t bytes )
{
uint16_t i;
uint8_t blocks;
configure_port_data_read();
for ( blocks = bytes / PATA_BLOCKLEN; blocks; blocks-- ) {
/* Wait for BSY goes low and DRQ goes high */
while ( pata_bsy() & !pata_drq() ) {}
/* PATA_RW_DATA_REGISTER */
ata_cs0_enable();
ata_da0_enable();
ata_da1_enable();
ata_da2_enable();
ata_rd_enable();
for ( i = 0; i < PATA_BLOCKLEN / 2; i++ ) {
*buffer++ = pata_get_lowbyte();
*buffer++ = pata_get_highbyte();
}
ata_rd_disable();
ata_cs0_disable();
ata_da0_disable();
ata_da1_disable();
ata_da2_disable();
}
}
void pata_write_bytes ( uint8_t *buffer, uint16_t bytes )
{
uint16_t i, a;
uint8_t blocks;
a = 0;
for ( blocks = bytes / PATA_BLOCKLEN; blocks; blocks-- ) {
/* Wait for BSY goes low and DRQ goes high */
while ( pata_bsy() & !pata_drq() ) {}
configure_port_data_write();
/* PATA_RW_DATA_REGISTER */
ata_cs0_enable();
ata_da0_enable();
ata_da1_enable();
ata_da2_enable();
ata_wr_enable();
for ( i = 0; i < PATA_BLOCKLEN / 2; i++ ) {
pata_set_highbyte ( buffer[a + 1] );
pata_set_lowbyte ( buffer[a] );
a += 2;
}
ata_wr_disable();
ata_cs0_disable();
ata_da0_disable();
ata_da1_disable();
ata_da2_disable();
}
}
void ata_identify ()
{
uint8_t buffer[512], i;
uint16_t word[256], n;
while ( pata_bsy() ) {}
write_io_register ( PATA_W_COMMAND_REGISTER, CMD_IDENTIFY_DEVICE );
pata_read_bytes ( buffer, 512 );
i = 0;
for ( n = 0; n < 512; n += 2 ) {
word[i] = ( ( buffer[n + 1] << 8 ) | buffer[n] );
i++;
}
uart_putstring ( PSTR ( "INFO: Number of logical cylinders: " ), false );
uart_putw_dec ( word[1] );
uart_put_nl();
uart_putstring ( PSTR ( "INFO: Number of logical heads: " ), false );
uart_putw_dec ( word[3] );
uart_put_nl();
uart_putstring ( PSTR ( "INFO: Number of logical sectors per logical track: " ), false );
uart_putw_dec ( word[6] );
uart_put_nl();
uart_putstring ( PSTR ( "INFO: Serial number: " ), false );
for ( i = 10; i <= 19; i++ ) {
uart_putc ( word[i] >> 8 );
uart_putc ( word[i] & 0x00FF );
}
uart_put_nl();
uart_putstring ( PSTR ( "INFO: Firmware revision: " ), false );
for ( i = 23; i <= 26; i++ ) {
uart_putc ( word[i] >> 8 );
uart_putc ( word[i] & 0x00FF );
}
uart_put_nl();
uart_putstring ( PSTR ( "INFO: Model number: " ), false );
for ( i = 27; i <= 46; i++ ) {
uart_putc ( word[i] >> 8 );
uart_putc ( word[i] & 0x00FF );
}
uart_put_nl();
uart_putstring ( PSTR ( "INFO: Capabilities: " ), false );
uart_putw_dec ( word[49] );
uart_put_nl();
uart_putstring ( PSTR ( "INFO: Number of current logical cylinders: " ), false );
uart_putw_dec ( word[54] );
uart_put_nl();
uart_putstring ( PSTR ( "INFO: Number of current logical heads: " ), false );
uart_putw_dec ( word[55] );
uart_put_nl();
uart_putstring ( PSTR ( "INFO: Number of current logical sectors per track: " ), false );
uart_putw_dec ( word[56] );
uart_put_nl();
uart_putstring ( PSTR ( "INFO: Current capacity in sectors: " ), false );
uart_putdw_dec ( word[57] | (uint32_t)word[58] << 16 );
uart_put_nl();
uart_putstring ( PSTR ( "INFO: Total number of user addressable sectors (LBA mode only): " ), false );
uart_putdw_dec ( word[60] | (uint32_t)word[61] << 16 );
uart_put_nl();
uart_putstring ( PSTR ( "INFO: Minimum PIO transfer cycle time without flow control: " ), false );
uart_putdw_dec ( word[67] );
uart_putstring ( PSTR ( "ns" ), true );
}
/*
* Public functions
*/
uint8_t pata_init ()
{
uart_putstring ( PSTR ( "INFO: PATA init start" ), true );
while ( ( !pata_rdy() ) & pata_bsy() ) {}
/*set drive 0 to LBA mode*/
write_io_register ( PATA_RW_DEVICE_HEAD_REGISTER, ATA_LBA_DRIVE_0 );
while ( ( !pata_rdy() ) & pata_bsy() ) {}
/*recalibrate*/
write_io_register ( PATA_W_COMMAND_REGISTER, CMD_RECALIBRATE );
while ( pata_bsy() ) {}
uart_putstring ( PSTR ( "INFO: PATA disk has been found" ), true );
ata_identify();
return 0;
}
uint8_t pata_read_block ( uint32_t addr, uint8_t *buffer )
{
return pata_read_multiblock ( addr, buffer, 1 );
}
uint8_t pata_write_block ( uint32_t addr, uint8_t *buffer )
{
return pata_write_multiblock ( addr, buffer, 1 );
}
typedef union {
uint32_t value32;
struct {
uint8_t ll;
uint8_t lh;
uint8_t hl;
uint8_t hh;
} value8;
} sint32;
uint8_t pata_read_multiblock ( uint32_t addr, uint8_t *buffer, uint8_t numblocks )
{
sint32 x;
x.value32 = addr;
configure_port_data_write();
ata_wr_enable();
/* PATA_RW_SECTOR_COUNT_REGISTER */
ata_cs0_enable();
ata_da0_enable();
ata_da2_enable();
pata_set_lowbyte ( numblocks );
/* PATA_RW_SECTOR_NUMBER_REGISTER */
ata_da0_disable();
pata_set_lowbyte ( x.value8.ll );
/* PATA_RW_CYLINDER_LOW_REGISTER */
ata_da0_enable();
ata_da1_enable();
ata_da2_disable();
pata_set_lowbyte ( x.value8.lh );
/* PATA_RW_CYLINDER_HIGH_REGISTER */
ata_da0_disable();
pata_set_lowbyte ( x.value8.hl );
/* PATA_RW_DEVICE_HEAD_REGISTER */
ata_da0_enable();
ata_da1_disable();
pata_set_lowbyte ( ( x.value8.hh & 0x0F ) | ATA_LBA_DRIVE_0 );
/* PATA_W_COMMAND_REGISTER */
ata_da0_disable();
pata_set_lowbyte ( CMD_READ_SECTORS );
ata_cs0_disable();
ata_wr_disable();
pata_read_bytes ( buffer, numblocks * PATA_BLOCKLEN );
return pata_err();
}
uint8_t pata_write_multiblock ( uint32_t addr, uint8_t *buffer, uint8_t numblocks )
{
sint32 x;
x.value32 = addr;
configure_port_data_write();
ata_wr_enable();
/* PATA_RW_SECTOR_COUNT_REGISTER */
ata_cs0_enable();
ata_da0_enable();
ata_da2_enable();
pata_set_lowbyte ( numblocks );
/* PATA_RW_SECTOR_NUMBER_REGISTER */
ata_da0_disable();
pata_set_lowbyte ( x.value8.ll );
/* PATA_RW_CYLINDER_LOW_REGISTER */
ata_da0_enable();
ata_da1_enable();
ata_da2_disable();
pata_set_lowbyte ( x.value8.lh );
/* PATA_RW_CYLINDER_HIGH_REGISTER */
ata_da0_disable();
pata_set_lowbyte ( x.value8.hl );
/* PATA_RW_DEVICE_HEAD_REGISTER */
ata_da0_enable();
ata_da1_disable();
pata_set_lowbyte ( ( x.value8.hh & 0x0F ) | ATA_LBA_DRIVE_0 );
/* PATA_W_COMMAND_REGISTER */
ata_da0_disable();
pata_set_lowbyte ( CMD_WRITE_SECTORS );
ata_cs0_disable();
ata_wr_disable();
pata_write_bytes ( buffer, numblocks * PATA_BLOCKLEN );
/* wait until drive completed write */
while ( pata_bsy() ) {}
return pata_err();
}

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@ -1,59 +0,0 @@
/*-
* Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer
* in this position and unchanged.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/*
* $Id: wdc_drv_pata.h,v 1.9 2013/05/04 15:40:14 olivleh1 Exp $
*/
#ifndef WDC_DRV_PATA_H_
#define WDC_DRV_PATA_H_
extern uint8_t pata_init ();
extern uint8_t pata_read_block ( uint32_t addr, uint8_t *buffer );
extern uint8_t pata_write_block ( uint32_t addr, uint8_t *buffer );
extern uint8_t pata_read_multiblock ( uint32_t addr, uint8_t *buffer, uint8_t numblocks );
extern uint8_t pata_write_multiblock ( uint32_t addr, uint8_t *buffer, uint8_t numblocks );
#define ATA_STAT_BSY 0x80 /* ATA busy */
#define ATA_STAT_RDY 0x40 /* ATA ready */
#define ATA_STAT_DRQ 0x08 /* ATA data request */
#define ATA_STAT_ERR 0x01 /* ATA error */
#define ATA_LBA_DRIVE_0 0xE0
/* implemented ATA commands */
#define CMD_IDENTIFY_DEVICE 0xEC
#define CMD_READ_SECTORS 0x20
#define CMD_RECALIBRATE 0x10
#define CMD_SET_FEATURES 0xEF
#define CMD_WRITE_SECTORS 0x30
#define PATA_BLOCKLEN 512
#endif /* WDC_DRV_PATA_H_ */

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@ -1,127 +0,0 @@
/*-
* Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer
* in this position and unchanged.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/*
* $Id: wdc_if_disk.c,v 1.15 2013/05/04 15:40:14 olivleh1 Exp $
*/
#include <stdint.h>
#include "wdc_if_disk.h"
#include "wdc_drv_mmc.h"
#include "wdc_drv_pata.h"
#include "uart.h"
#include "wdc_par.h"
uint8_t wdc_init_disk ()
{
return ( *drv_init )();
}
uint32_t wdc_sector2diskblock ( uint16_t req_cylinder, uint8_t req_head, uint8_t req_sector )
{
return ( req_cylinder * wdc_get_hdd_heads() * wdc_get_hdd_sectors() )
+ ( req_head * wdc_get_hdd_sectors() )
+ ( req_sector - 1 );
}
uint32_t wdc_p8kblock2diskblock ( uint32_t blockno )
{
return blockno
+ ( wdc_get_hdd_heads() * wdc_get_hdd_sectors() );
}
uint8_t wdc_write_sector ( uint32_t addr, uint8_t *sector )
{
uint8_t errorcode;
errorcode = drv_write_block ( addr, sector );
if ( errorcode ) {
uart_putstring ( PSTR ( "ERROR: write error at address: " ), false );
uart_putdw_dec ( addr );
uart_putstring ( PSTR ( " / errorcode is: " ), false );
uart_putc_hex ( errorcode );
uart_put_nl();
return errorcode;
} else {
return 0;
}
}
uint8_t wdc_read_sector ( uint32_t addr, uint8_t *sector )
{
uint8_t errorcode;
errorcode = drv_read_block ( addr, sector );
if ( errorcode ) {
uart_putstring ( PSTR ( "ERROR: read error at address: " ), false );
uart_putdw_dec ( addr );
uart_putstring ( PSTR ( " / errorcode is: " ), false );
uart_putc_hex ( errorcode );
uart_put_nl();
return errorcode;
} else {
return 0;
}
}
uint8_t wdc_read_multiblock ( uint32_t addr, uint8_t *sector, uint8_t numblocks )
{
uint8_t errorcode;
errorcode = drv_read_multiblock ( addr, sector, numblocks );
if ( errorcode ) {
uart_putstring ( PSTR ( "ERROR: read error at address: " ), false );
uart_putdw_dec ( addr );
uart_putstring ( PSTR ( " / errorcode is: " ), false );
uart_putc_hex ( errorcode );
uart_put_nl();
return errorcode;
} else {
return 0;
}
}
uint8_t wdc_write_multiblock ( uint32_t addr, uint8_t *sector, uint8_t numblocks )
{
uint8_t errorcode;
errorcode = drv_write_multiblock ( addr, sector, numblocks );
if ( errorcode ) {
uart_putstring ( PSTR ( "ERROR: write error at address: " ), false );
uart_putdw_dec ( addr );
uart_putstring ( PSTR ( " / errorcode is: " ), false );
uart_putc_hex ( errorcode );
uart_put_nl();
return errorcode;
} else {
return 0;
}
}

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@ -1,63 +0,0 @@
/*-
* Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer
* in this position and unchanged.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/*
* $Id: wdc_if_disk.h,v 1.11 2013/05/09 12:30:25 olivleh1 Exp $
*/
#ifndef WDC_IF_DISK_H_
#define WDC_IF_DISK_H_
#include <stdio.h>
extern uint8_t wdc_init_disk ();
extern uint32_t wdc_sector2diskblock ( uint16_t req_cylinder, uint8_t req_head, uint8_t req_sector );
extern uint32_t wdc_p8kblock2diskblock ( uint32_t blockno );
extern uint8_t wdc_write_sector ( uint32_t addr, uint8_t *sector );
extern uint8_t wdc_read_sector ( uint32_t addr, uint8_t *sector );
extern uint8_t wdc_read_multiblock ( uint32_t addr, uint8_t *sector, uint8_t numblocks );
extern uint8_t wdc_write_multiblock ( uint32_t addr, uint8_t *sector, uint8_t numblocks );
typedef uint8_t ( *t_drv_init )();
typedef uint8_t ( *t_drv_read_block )( uint32_t addr, uint8_t *buffer );
typedef uint8_t ( *t_drv_write_block )( uint32_t addr, uint8_t *buffer );
typedef uint8_t ( *t_drv_read_multiblock )( uint32_t addr, uint8_t *buffer, uint8_t numblocks );
typedef uint8_t ( *t_drv_write_multiblock )( uint32_t addr, uint8_t *buffer, uint8_t numblocks );
t_drv_init drv_init;
t_drv_read_block drv_read_block;
t_drv_write_block drv_write_block;
t_drv_read_multiblock drv_read_multiblock;
t_drv_write_multiblock drv_write_multiblock;
#define wdc_number_of_disks() 1
#define WDC_BLOCKLEN 512
#endif /* WDC_IF_DISK_H_ */

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/*-
* Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer
* in this position and unchanged.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/*
* $Id: wdc_if_disk_perf.c,v 1.12 2013/05/04 15:40:15 olivleh1 Exp $
*/
#include <avr/io.h>
#include <avr/interrupt.h>
#include <string.h>
#include <stdlib.h>
#include <avr/pgmspace.h>
#include <avr/sleep.h>
#include "wdc_config.h"
#include "wdc_if_disk.h"
#include "wdc_ram.h"
#include "uart.h"
#ifdef MEASURE_DISK_PERFORMANCE
#define BLOCKNO 300000
volatile uint32_t overflow = 0;
ISR ( TIMER0_OVF_vect ) {
overflow++;
}
/* switched from local to global for keeping an eye on memory usage */
extern uint8_t data_buffer[];
extern uint8_t cmd_buffer[];
void test_write4k ( uint8_t numblocks, uint8_t nr_of_tests )
{
uint32_t starttime;
uint32_t blockno = 0;
uint8_t i8, errorcode;
uart_putstring ( PSTR ( "Test Write 5000 512B-Blocks with Multiblock-Write (4KB Blocksize):" ) );
uart_putc ( '\n' );
memset ( &data_buffer[0], 0xCC, WDC_BLOCKLEN * numblocks );
for ( i8 = 0; i8 < nr_of_tests; i8++ ) {
blockno = BLOCKNO;
for ( starttime = overflow; blockno < ( (uint32_t)BLOCKNO + 5000 ); blockno += numblocks ) {
errorcode = wdc_write_multiblock ( blockno, data_buffer, numblocks );
if ( errorcode ) {
break;
}
}
if ( errorcode ) {
break;
}
uart_putdw_dec ( overflow - starttime );
uart_putc ( '\n' );
}
}
void test_read4k ( uint8_t numblocks, uint8_t nr_of_tests )
{
uint32_t starttime;
uint32_t blockno = 0;
uint8_t i8, errorcode;
uart_putstring ( PSTR ( "Test Read 5000 512B-Blocks with Multiblock-Read (4KB Blocksize):" ) );
uart_putc ( '\n' );
for ( i8 = 0; i8 < nr_of_tests; i8++ ) {
blockno = BLOCKNO;
for ( starttime = overflow; blockno < ( (uint32_t)BLOCKNO + 5000 ); blockno += numblocks ) {
errorcode = wdc_read_multiblock ( blockno, data_buffer, numblocks );
if ( errorcode ) {
break;
}
}
if ( errorcode ) {
break;
}
uart_putdw_dec ( overflow - starttime );
uart_putc ( '\n' );
}
}
void test_write512 ( uint8_t numblocks, uint8_t nr_of_tests )
{
uint32_t starttime;
uint32_t blockno = 0;
uint8_t i8, errorcode;
uart_putstring ( PSTR ( "Test Write 5000 512B-Blocks with Singleblock-Write (512B Blocksize):" ) );
uart_putc ( '\n' );
memset ( &data_buffer[0], 0xEF, WDC_BLOCKLEN * numblocks );
for ( i8 = 0; i8 < nr_of_tests; i8++ ) {
blockno = BLOCKNO;
for ( starttime = overflow; blockno < ( (uint32_t)BLOCKNO + 5000 ); blockno++ ) {
errorcode = wdc_write_sector ( blockno, data_buffer );
if ( errorcode ) {
break;
}
}
if ( errorcode ) {
break;
}
uart_putdw_dec ( overflow - starttime );
uart_putc ( '\n' );
}
}
void test_read512 ( uint8_t numblocks, uint8_t nr_of_tests )
{
uint32_t starttime;
uint32_t blockno = 0;
uint8_t i8, errorcode;
uart_putstring ( PSTR ( "Test Read 5000 512B-Blocks with Singleblock-Read (512B Blocksize):" ) );
uart_putc ( '\n' );
for ( i8 = 0; i8 < nr_of_tests; i8++ ) {
blockno = BLOCKNO;
for ( starttime = overflow; blockno < ( (uint32_t)BLOCKNO + 5000 ); blockno++ ) {
errorcode = wdc_read_sector ( blockno, data_buffer );
if ( errorcode ) {
break;
}
}
if ( errorcode ) {
break;
}
uart_putdw_dec ( overflow - starttime );
uart_putc ( '\n' );
}
}
void measure_performance ()
{
uint8_t numblocks = 4;
uint8_t nr_of_tests = 2;
sei();
TIMSK0 |= ( 0x01 << TOIE0 );
TCCR0B = ( 1 << CS01 ); /* Prescaler 8 */
TCNT0 = 0x00;
uart_putstring ( PSTR ( "Performance Measurement. Displayed are the Timer-Overflows." ) );
uart_putc ( '\n' );
uart_putstring ( PSTR ( "Timer is initialized with a Prescaler 8" ) );
uart_putc ( '\n' );
test_write512 ( numblocks, nr_of_tests );
test_read512 ( numblocks, nr_of_tests );
test_write512 ( numblocks, nr_of_tests );
test_read4k ( numblocks, nr_of_tests );
test_write4k ( numblocks, nr_of_tests );
test_read4k ( numblocks, nr_of_tests );
test_write512 ( numblocks, nr_of_tests );
test_write4k ( numblocks, nr_of_tests );
test_read512 ( numblocks, nr_of_tests );
test_read4k ( numblocks, nr_of_tests );
test_read512 ( numblocks, nr_of_tests );
test_write4k ( numblocks, nr_of_tests );
test_write512 ( numblocks, nr_of_tests );
uart_putstring ( PSTR ( "End" ) );
uart_putc ( '\n' );
while ( 1 ) {}
}
#endif

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@ -1,145 +0,0 @@
/*-
* Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer
* in this position and unchanged.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/*
* $Id: wdc_if_p8000.c,v 1.17 2013/05/09 12:30:25 olivleh1 Exp $
*/
#include "wdc_config.h"
#include <avr/io.h>
#include <util/delay.h>
#include "wdc_avr.h"
#include "wdc_if_p8000.h"
#include "wdc_par.h"
void wdc_wait_for_reset ()
{
port_data_set ( DATA_CLEAR );
port_info_set ( INFO_CLEAR );
wdc_set_initialized ( 1 );
while ( isset_info_reset() ) {}
}
uint8_t wdc_read_data_from_p8k ( uint8_t *buffer, uint16_t count, uint8_t wdc_status )
{
uint16_t datacnt;
_delay_us ( DELAY_PIO_US );
configure_port_data_read();
datacnt = 0;
port_info_set ( wdc_status );
while ( !isset_info_te() ) {
if ( isset_info_reset() ) {
return 0;
}
}
while ( !isset_info_wdardy() ) {}
do {
enable_p8000com(); /* this also generates /ASTB in the moment /WDARDY gets low with a 7403 */
while ( isset_info_wdardy() ) {}
*buffer++ = port_data_get();
disable_p8000com(); /* this additionally brings /ASTB to high */
while ( !isset_info_wdardy() ) {}
datacnt++;
} while ( datacnt < count );
port_info_set ( INFO_CLEAR );
return 1;
}
void wdc_write_data_to_p8k ( uint8_t *buffer, uint16_t count, uint8_t wdc_status )
{
uint16_t datacnt = 0;
_delay_us ( DELAY_PIO_US );
port_info_set ( INFO_TR | wdc_status );
while ( isset_info_te() ) {}
configure_port_data_write();
while ( !isset_info_wdardy() ) {}
do {
enable_p8000com(); /* this also generates /ASTB in the moment /WDARDY gets low with a 7403 */
while ( isset_info_wdardy() ) {}
port_data_set ( *buffer++ );
disable_p8000com(); /* this additionally brings /ASTB to high */
while ( !isset_info_wdardy() ) {}
datacnt++;
} while ( datacnt < count );
while ( isset_info_wdardy() ) {}
enable_p8000com();
nop();
disable_p8000com();
configure_port_data_read();
while ( !isset_info_wdardy() ) {}
port_info_set ( INFO_CLEAR );
}
uint8_t wdc_receive_cmd ( uint8_t *buffer, uint16_t count )
{
return wdc_read_data_from_p8k ( buffer
, count
, INFO_STAT_GCMD
);
}
void wdc_receive_data ( uint8_t *buffer, uint16_t count )
{
wdc_read_data_from_p8k ( buffer
, count
, INFO_STAT_RDATA
);
}
void wdc_send_data ( uint8_t *buffer, uint16_t count )
{
wdc_write_data_to_p8k ( buffer
, count
, INFO_STAT_WDATA
);
}
void wdc_send_error ()
{
wdc_send_errorcode ( 0x01 );
}
void wdc_send_errorcode ( uint8_t error )
{
uint8_t buffer[1];
buffer[0] = error;
wdc_write_data_to_p8k ( buffer
, 1
, INFO_STAT_ERROR
);
}

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/*-
* Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer
* in this position and unchanged.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/*
* $Id: wdc_if_p8000.h,v 1.13 2013/05/04 15:40:15 olivleh1 Exp $
*/
#ifndef WDC_IF_P8000_H_
#define WDC_IF_P8000_H_
#define DELAY_PIO_US 550
/* input pin handling */
#define isset_info_reset() (( PIN_INFO ) & ( 1 << PIN_INFO_RST ))
#define isset_info_te() (( PIN_INFO ) & ( 1 << PIN_INFO_TE ))
#define isset_info_wdardy() (( PIN_INFO ) & ( 1 << PIN_INFO_WDARDY ))
/* output pin handling */
#define DATA_CLEAR 0x00
#define INFO_CLEAR 0x00
#define INFO_STAT_GCMD (( 1 << PIN_INFO_STATUS0 ) ) /* 0x01 */
#define INFO_STAT_RDATA ( ( 1 << PIN_INFO_STATUS1 ) ) /* 0x02 */
#define INFO_STAT_WDATA (( 1 << PIN_INFO_STATUS0 ) | ( 1 << PIN_INFO_STATUS1 ) ) /* 0x03 */
#define _INFO_STAT_CRCERR ( ( 1 << PIN_INFO_STATUS1 ) | ( 1 << PIN_INFO_STATUS2 )) /* 0x06 */
#define INFO_STAT_ERROR (( 1 << PIN_INFO_STATUS0 ) | ( 1 << PIN_INFO_STATUS1 ) | ( 1 << PIN_INFO_STATUS2 )) /* 0x07 */
#define INFO_TR ( 1 << PIN_INFO_TR ) /* 0x40 */
extern void wdc_wait_for_reset ();
extern uint8_t wdc_receive_cmd ( uint8_t *buffer, uint16_t count );
extern void wdc_receive_data ( uint8_t *buffer, uint16_t count );
extern void wdc_send_data ( uint8_t *buffer, uint16_t count );
extern void wdc_send_error ();
extern void wdc_send_errorcode ( uint8_t error );
#endif /* WDC_IF_P8000_H_ */

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@ -1,449 +0,0 @@
/*-
* Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer
* in this position and unchanged.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/*
* $Id: wdc_main.c,v 1.36 2013/05/09 12:30:25 olivleh1 Exp $
*
*/
/* TODO: - right now, BTT entries are not taken into account */
#include <avr/io.h>
#include <avr/interrupt.h>
#include <string.h>
#include <stdlib.h>
#include <avr/pgmspace.h>
#include <avr/sleep.h>
#include "wdc_config.h"
#include <util/delay.h>
#include "wdc_main.h"
#ifdef DEBUG
#include "uart.h"
#endif
#include "wdc_avr.h"
#include "wdc_ram.h"
#include "wdc_par.h"
#include "wdc_if_p8000.h"
#include "wdc_if_disk.h"
void atmega_setup ( void );
uint8_t data_buffer[4096];
uint8_t cmd_buffer[9];
#ifdef MEASURE_DISK_PERFORMANCE
extern void measure_performance ();
#else
/* switched from local to global for keeping an eye on memory usage */
extern uint8_t valid_disk;
#endif
int __attribute__( ( OS_main ) )
main ( void )
{
#ifndef MEASURE_DISK_PERFORMANCE
uint16_t cmd_counter = 9;
uint16_t data_counter;
uint32_t blockno;
uint8_t errorcode;
uint8_t i8;
#endif
atmega_setup();
#ifdef MEASURE_DISK_PERFORMANCE
measure_performance();
#else
/* load Parameter Table into RAM if valid */
if ( wdc_get_disk_valid() ) {
blockno = 0;
data_counter = WDC_BLOCKLEN;
wdc_read_sector ( blockno, data_buffer );
if ( data_buffer[0] == 'W' &&
data_buffer[1] == 'D' &&
data_buffer[2] == 'C' &&
data_buffer[3] == '_' &&
data_buffer[4] == '4' &&
data_buffer[5] == '.' &&
data_buffer[6] == '2' ) {
wdc_write_par_table ( data_buffer, data_counter );
uart_putstring ( PSTR ( "INFO: Disk found and ready to use." ), true );
wdc_set_disk_valid();
} else {
uart_putstring ( PSTR ( "INFO: Disk found but Sector 0 is invalid, please execute sa.format to initialize this disk properly." ), true );
wdc_set_disk_invalid();
}
}
while ( 1 ) {
wdc_wait_for_reset();
if ( wdc_receive_cmd ( cmd_buffer
, cmd_counter
) ) {
#if DEBUG >= 2
#if DEBUG >= 3
uart_putstring ( PSTR ( "DEBUG: received command is:" ), false );
#endif
uart_putc_hex ( cmd_buffer[0] );
#if DEBUG >= 3
uart_putc_hex ( cmd_buffer[1] );
uart_putc_hex ( cmd_buffer[2] );
uart_putc_hex ( cmd_buffer[3] );
uart_putc_hex ( cmd_buffer[4] );
uart_putc_hex ( cmd_buffer[5] );
uart_putc_hex ( cmd_buffer[6] );
uart_putc_hex ( cmd_buffer[7] );
uart_putc_hex ( cmd_buffer[8] );
#endif
uart_putnl();
#endif
/* no drive attached */
if ( wdc_get_initialized() && wdc_get_num_of_drvs() == 0 ) {
if ( cmd_buffer[0] == CMD_WR_WDC_RAM
|| cmd_buffer[0] == CMD_RD_BLOCK ) {
wdc_send_errorcode ( 0xc1 );
} else if ( cmd_buffer[0] == CMD_RD_WDC_RAM ) {
wdc_send_errorcode ( ERR_NO_DRIVE_READY );
wdc_set_initialized ( 0 );
}
/* WDC freshly initialized after RESET, the disk is not valid */
} else if ( wdc_get_initialized()
&& !wdc_get_disk_valid()
&& ( cmd_buffer[0] == CMD_WR_WDC_RAM || cmd_buffer[0] == CMD_RD_BLOCK ) ) {
wdc_send_errorcode ( ERR_CYL0_NOT_READABLE );
wdc_set_initialized ( 0 );
/* if the disk is not valid, only maintenance commands are allowed */
} else if ( !wdc_get_disk_valid()
&& cmd_buffer[0] != CMD_RD_WDC_RAM
&& cmd_buffer[0] != CMD_FMTRD_TRACK
&& cmd_buffer[0] != CMD_WR_WDC_RAM
&& cmd_buffer[0] != CMD_FMTBTT_TRACK
&& cmd_buffer[0] != CMD_RD_PARTAB
&& cmd_buffer[0] != CMD_RD_WDCERR
&& cmd_buffer[0] != CMD_VER_TRACK
&& cmd_buffer[0] != CMD_DL_BTTAB
&& cmd_buffer[0] != CMD_RD_BTTAB
&& cmd_buffer[0] != CMD_WR_BTTAB
&& cmd_buffer[0] != CMD_WR_PARTAB
&& cmd_buffer[0] != CMD_ST_PARBTT
) {
if ( cmd_buffer[0] == CMD_RD_BLOCK ) {
wdc_send_errorcode ( ERR_SECT_N_ON_SURFACE );
} else {
wdc_send_error();
}
/* if the specified drive exceeds the number of drives, no drive commands are allowed */
} else if ( cmd_buffer[1] >= wdc_number_of_disks()
&& ( cmd_buffer[0] == CMD_RD_SECTOR
|| cmd_buffer[0] == CMD_FMTRD_TRACK
|| cmd_buffer[0] == CMD_RD_BLOCK
|| cmd_buffer[0] == CMD_WR_BLOCK
|| cmd_buffer[0] == CMD_FMTBTT_TRACK
|| cmd_buffer[0] == CMD_VER_TRACK
|| ( cmd_buffer[0] == CMD_RD_BTTAB && !wdc_get_btt_cleared() )
)
) {
if ( cmd_buffer[0] == CMD_RD_BTTAB ) {
wdc_send_errorcode ( ERR_BTT_INVALID );
} else {
wdc_send_errorcode ( ERR_DRIVE_NOT_READY );
}
} else {
switch ( cmd_buffer[0] ) {
case CMD_WR_BLOCK:
data_counter = ( cmd_buffer[7] << 8 ) | cmd_buffer[6];
blockno = wdc_p8kblock2diskblock ( ( (uint32_t)cmd_buffer[5] << 24 ) | ( (uint32_t)cmd_buffer[4] << 16 ) | ( (uint16_t)cmd_buffer[3] << 8 ) | cmd_buffer[2] );
wdc_receive_data ( data_buffer
, data_counter
);
errorcode = 1;
if ( data_counter == WDC_BLOCKLEN ) {
errorcode = wdc_write_sector ( blockno, data_buffer );
} else {
errorcode = wdc_write_multiblock ( blockno, data_buffer, data_counter / WDC_BLOCKLEN );
}
if ( errorcode ) {
wdc_send_error();
}
break;
case CMD_RD_BLOCK:
data_counter = ( cmd_buffer[7] << 8 ) | cmd_buffer[6];
blockno = wdc_p8kblock2diskblock ( ( (uint32_t)cmd_buffer[5] << 24 ) | ( (uint32_t)cmd_buffer[4] << 16 ) | ( (uint16_t)cmd_buffer[3] << 8 ) | cmd_buffer[2] );
errorcode = 1;
if ( data_counter == WDC_BLOCKLEN ) {
errorcode = wdc_read_sector ( blockno, data_buffer );
} else {
errorcode = wdc_read_multiblock ( blockno, data_buffer, data_counter / WDC_BLOCKLEN );
}
if ( errorcode ) {
wdc_send_error();
} else {
wdc_send_data ( data_buffer
, data_counter
);
}
break;
case CMD_WR_WDC_RAM:
data_counter = ( cmd_buffer[7] << 8 ) | cmd_buffer[6];
wdc_receive_data ( data_buffer
, data_counter
);
wdc_write_data_to_ram ( data_buffer
, convert_ram_address ( ( cmd_buffer[2] << 8 ) | cmd_buffer[1] )
, data_counter
);
break;
case CMD_RD_WDC_RAM:
data_counter = ( cmd_buffer[7] << 8 ) | cmd_buffer[6];
wdc_read_data_from_ram ( data_buffer
, convert_ram_address ( ( cmd_buffer[2] << 8 ) | cmd_buffer[1] )
, data_counter
);
wdc_send_data ( data_buffer
, data_counter
);
wdc_set_initialized ( 0 );
break;
case CMD_RD_PARTAB:
data_counter = ( cmd_buffer[7] << 8 ) | cmd_buffer[6];
wdc_read_par_table ( data_buffer
, data_counter );
wdc_send_data ( data_buffer
, data_counter
);
break;
case CMD_WR_PARTAB:
data_counter = ( cmd_buffer[7] << 8 ) | cmd_buffer[6];
wdc_receive_data ( data_buffer
, data_counter
);
wdc_write_wdc_par ( data_buffer
, data_counter );
break;
case CMD_DL_BTTAB:
wdc_del_wdc_btt();
break;
case CMD_RD_BTTAB:
data_counter = ( cmd_buffer[7] << 8 ) | cmd_buffer[6];
wdc_read_wdc_btt ( data_buffer
, data_counter );
wdc_send_data ( data_buffer
, data_counter
);
break;
case CMD_WR_BTTAB:
data_counter = ( cmd_buffer[7] << 8 ) | cmd_buffer[6];
wdc_receive_data ( data_buffer
, data_counter
);
wdc_write_wdc_btt ( data_buffer
, data_counter );
break;
case CMD_FMTRD_TRACK:
case CMD_FMTBTT_TRACK:
/* no cylinder 0 formatting if command is CMD_FMTBTT_TRACK */
if ( cmd_buffer[0] == CMD_FMTBTT_TRACK && ( cmd_buffer[2] | ( cmd_buffer[3] << 8 ) ) == 0 ) {
break;
}
data_counter = WDC_BLOCKLEN;
memset ( &data_buffer[0], 0x00, data_counter );
blockno = wdc_sector2diskblock ( cmd_buffer[2] | ( cmd_buffer[3] << 8 )
, cmd_buffer[4]
, cmd_buffer[5]
);
errorcode = 1;
for ( i8 = 0; i8 < wdc_get_hdd_sectors(); i8++ ) {
errorcode = wdc_write_sector ( blockno, data_buffer );
if ( errorcode ) {
break;
}
blockno++;
}
if ( errorcode ) {
if ( cmd_buffer[0] == CMD_FMTRD_TRACK ) {
wdc_send_error();
} else {
errorcode = wdc_add_btt_entry ( cmd_buffer[2] | ( cmd_buffer[3] << 8 ), cmd_buffer[4] );
if ( errorcode ) {
wdc_send_errorcode ( errorcode );
} else {
data_buffer[0] = cmd_buffer[2]; /* Track Low */
data_buffer[1] = cmd_buffer[3]; /* Track High */
data_buffer[2] = cmd_buffer[4]; /* Head */
wdc_send_data ( data_buffer
, 3
);
}
}
}
break;
case CMD_ST_PARBTT:
data_counter = WDC_BLOCKLEN;
blockno = 0;
wdc_set_disk_valid();
wdc_read_par_table ( data_buffer
, data_counter );
errorcode = wdc_write_sector ( blockno, data_buffer );
if ( errorcode ) {
wdc_send_error();
}
break;
case CMD_RD_WDCERR:
data_counter = ( cmd_buffer[7] << 8 ) | cmd_buffer[6];
memset ( &data_buffer[0], 0x00, data_counter );
wdc_send_data ( data_buffer
, data_counter
);
break;
case CMD_VER_TRACK:
data_counter = WDC_BLOCKLEN;
blockno = wdc_sector2diskblock ( cmd_buffer[2] | ( cmd_buffer[3] << 8 )
, cmd_buffer[4]
, cmd_buffer[5]
);
errorcode = 1;
for ( i8 = 0; i8 < wdc_get_hdd_sectors(); i8++ ) {
errorcode = wdc_read_sector ( blockno, data_buffer );
if ( errorcode ) {
break;
}
blockno++;
}
if ( errorcode ) {
wdc_send_error();
}
break;
case CMD_RD_SECTOR:
data_counter = ( cmd_buffer[7] << 8 ) | cmd_buffer[6];
blockno = wdc_sector2diskblock ( cmd_buffer[2] | ( cmd_buffer[3] << 8 )
, cmd_buffer[4]
, cmd_buffer[5]
);
errorcode = 1;
if ( data_counter == WDC_BLOCKLEN ) {
errorcode = wdc_write_sector ( blockno, data_buffer );
} else {
errorcode = wdc_write_multiblock ( blockno, data_buffer, data_counter / WDC_BLOCKLEN );
}
if ( errorcode ) {
wdc_send_error();
}
break;
default:
#if DEBUG >= 1
uart_putstring ( PSTR ( "ERROR: Unknown command received from the P8000:" ), false );
uart_putc_hex ( cmd_buffer[0] );
uart_putc_hex ( cmd_buffer[1] );
uart_putc_hex ( cmd_buffer[2] );
uart_putc_hex ( cmd_buffer[3] );
uart_putc_hex ( cmd_buffer[4] );
uart_putc_hex ( cmd_buffer[5] );
uart_putc_hex ( cmd_buffer[6] );
uart_putc_hex ( cmd_buffer[7] );
uart_putc_hex ( cmd_buffer[8] );
uart_put_nl();
#endif
wdc_send_error();
break;
}
}
}
}
#endif
return 0;
}
void atmega_setup ( void )
{
set_sleep_mode ( SLEEP_MODE_IDLE );
/* is needed for some disks (for example Maxtor 6L080J4) and SD-Cards*/
_delay_ms ( 400 );
uart_init();
uart_putstring ( PSTR ( "=== P8000 WDC Emulator 0.92 ===" ), true );
wdc_init_avr();
wdc_get_sysconf();
if ( wdc_init_disk() ) {
uart_putstring ( PSTR ( "ERROR: No disk found!" ), true );
wdc_set_no_disk();
}
}

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@ -1,69 +0,0 @@
/*-
* Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer
* in this position and unchanged.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/*
* $Id: wdc_main.h,v 1.15 2013/05/09 12:30:25 olivleh1 Exp $
*/
#ifndef MAIN_H_
#define MAIN_H_
#define CMD_RD_SECTOR 0x01 /* read data beginning at given sector */
#define ___CMD_WR_SECTOR 0x02 /* write sector */
#define ___CMD_FMT_TRACK 0x04 /* format a track */
#define CMD_RD_WDC_RAM 0x08 /* read data from WDC RAM */
#define ___CMD_RDBTT_SECTOR 0x11 /* read sector taking BTT into account */
#define ___CMD_WRBTT_SECTOR 0x12 /* write sector taking BTT into account */
#define CMD_FMTRD_TRACK 0x14 /* format and reread a track */
#define CMD_WR_WDC_RAM 0x18 /* write data to WDC RAM */
#define CMD_RD_BLOCK 0x21 /* read data beginning at given block */
#define CMD_WR_BLOCK 0x22 /* write data beginning at given block */
#define CMD_FMTBTT_TRACK 0x24 /* format a track and provide BTT info */
#define CMD_RD_PARTAB 0x28 /* read Parameter block from WDC RAM */
#define CMD_RD_WDCERR 0x38 /* read error statistics */
#define CMD_VER_TRACK 0x44 /* verify track */
#define CMD_DL_BTTAB 0x48 /* delete Bad Track Table from WDC RAM */
#define CMD_RD_BTTAB 0x58 /* read Bad Track Table from WDC RAM */
#define CMD_WR_BTTAB 0x68 /* write Bad Track Table to WDC RAM */
#define CMD_WR_PARTAB 0x78 /* write Parameter block to WDC RAM */
#define ___CMD_VER_SECTOR 0x81 /* verify sector */
#define ___CMD_WRRD_SECTOR 0x82 /* write and reread sector */
#define ___CMD_DL_TRACK 0x84 /* delete a track */
#define ___CMD_WRRDBTT_SECTOR 0x92 /* write and reread sector taking BTT into account */
#define ___CMD_CP_BLOCK 0xa1 /* copy block from drive 1 to drive 0 */
#define ___CMD_WRRD_BLOCK 0xa2 /* write and reread block */
#define CMD_ST_PARBTT 0xc2 /* store Parameter block and BTT on hard disk */
#define ERR_STANDARD 0x01
#define ERR_DRIVE_NOT_READY 0x03
#define ERR_SECT_N_ON_SURFACE 0x0A
#define ERR_BTT_FULL 0x16
#define ERR_BTT_INVALID 0x18
#define ERR_NO_DRIVE_READY 0x27
#define ERR_CYL0_NOT_READABLE 0x31
#endif /* MAIN_H_ */

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/*-
* Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer
* in this position and unchanged.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/*
* $Id: wdc_par.c,v 1.10 2013/05/09 12:30:25 olivleh1 Exp $
*/
#include <avr/pgmspace.h>
#include "wdc_main.h"
#include "wdc_par.h"
#include "uart.h"
/*
* unformatted ST138
*
* 57 44 43 5F 34 2E 32 81 81 81 81 81 81 81 81 81
* 81 81 81 81 81 81 81 64 00 02 12 64 00 01 81 81
* 81 81 81 81 81 81 81 81 81 81 EB 0D 00 00 41 00
* 01 01 81 81 81 81 81 81 81 81 81 81 81 81 81 81
* 81 81 81 81 81 EB 0D 00 00 24 00 00 81 81 81 81
* 00 81 00 80 FE 00 00 00 01 81 81 73 00 12 81 01
* 00 02 00 00 81 81 81 00 41 D7 28 81 81 81 81 81
* 81 81 81 81 81 81 81 81 81 81 81 81 81 81 81 81
*
*
* fresh formatted ST138
*
* 57 44 43 5F 34 2E 32 81 53 54 32 35 31 2D 31 20
* 20 20 20 20 81 00 00 34 03 06 12 34 03 01 00 00
* 00 00 00 00 CB D1 FB FD F1 F3 83 59 01 00 01 09
* 00 01 81 81 81 81 81 81 81 81 81 81 81 81 81 81
* 81 81 81 81 81 83 59 01 00 6C 00 00 81 81 81 E5
* 00 81 00 80 FE 00 00 00 01 81 81 33 00 12 81 00
* 00 00 00 00 81 81 81 09 01 D7 28 81 81 81 81 81
* 81 81 81 81 81 81 81 81 81 81 81 81 81 81 81 81
*
*
* no harddrive attached:
*
* 57 44 43 5F 34 2E 32 81 81 81 81 81 81 81 81 81
* 81 81 81 81 81 81 81 64 00 02 12 64 00 01 81 81
* 81 81 81 81 81 81 81 81 81 81 81 81 81 81 40 00
* 00 00 81 81 81 81 81 81 81 81 81 81 81 81 81 81
* 81 81 81 81 81 81 81 81 81 81 81 81 81 81 81 81
* 00 81 00 80 81 81 81 81 81 81 81 33 00 12 81 00
* 81 81 81 81 81 81 81 00 40 D7 81 81 81 81 81 81
* 81 81 81 81 81 81 81 81 81 81 81 81 81 81 81 81
*
*/
uint8_t par_table[512];
const uint8_t
par_tab_new_dsk[128] =
{
'W', 'D', 'C', '_', '4', '.', '2', 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81,
0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x64, 0x00, 0x02, 0x12, 0x64, 0x00, 0x01, 0x81, 0x81,
0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, /* init with sa.format ends here */
/* to be initiated by controller starts here */ 0xEB, 0x0D, 0x00, 0x00, 0x41, 0x00,
0x01, 0x01, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81,
0x81, 0x81, 0x81, 0x81, 0x81, 0xEB, 0x0D, 0x00, 0x00, 0x24, 0x00, 0x00, 0x81, 0x81, 0x81, 0x81,
0x00, 0x81, 0x00, 0x80, 0xfe, 0x00, 0x00, 0x00, 0x01, 0x81, 0x81, 0x73, 0x00, 0x12, 0x81, 0x01,
0x00, 0x02, 0x00, 0x00, 0x81, 0x81, 0x81, 0x00, 0x41, 0xd7, 0x28, 0x81, 0x81, 0x81, 0x81, 0x81,
0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81,
};
const uint8_t
par_tab_no_dsk[128] =
{
'W', 'D', 'C', '_', '4', '.', '2', 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81,
0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x64, 0x00, 0x02, 0x12, 0x64, 0x00, 0x01, 0x81, 0x81,
0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, /* init with sa.format ends here */
/* to be initiated by controller starts here */ 0x81, 0x81, 0x81, 0x81, 0x40, 0x00,
0x00, 0x00, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81,
0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81,
0x00, 0x81, 0x00, 0x80, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x33, 0x00, 0x12, 0x81, 0x00,
0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x00, 0x40, 0xd7, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81,
0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81,
};
uint8_t valid_disk = 1;
uint8_t initialized;
uint8_t btt_cleared = 0;
void wdc_read_par_table ( uint8_t *buffer, uint16_t count )
{
do {
count--;
buffer[count] = par_table[count];
} while ( count > 0 );
}
void wdc_write_par_table ( uint8_t *buffer, uint16_t count )
{
do {
count--;
par_table[count] = buffer[count];
} while ( count > 0 );
}
void wdc_read_wdc_par ( uint8_t *buffer, uint16_t count )
{
do {
count--;
buffer[count] = par_table[count + POS_PAR_WDC_PAR];
} while ( count > 0 );
}
void wdc_write_wdc_par ( uint8_t *buffer, uint16_t count )
{
do {
count--;
par_table[count + POS_PAR_WDC_PAR] = buffer[count];
} while ( count > 0 );
}
void wdc_del_wdc_btt ()
{
uint8_t i;
for ( i = 0; i < 125; i++ ) {
par_table[i + POS_PAR_WDC_BTT] = 0x00;
}
par_table[122 + POS_PAR_WDC_BTT] = 0xff;
btt_cleared = 1;
}
void wdc_read_wdc_btt ( uint8_t *buffer, uint16_t count )
{
do {
count--;
buffer[count] = par_table[count + POS_PAR_WDC_BTT];
} while ( count > 0 );
}
void wdc_write_wdc_btt ( uint8_t *buffer, uint16_t count )
{
do {
count--;
par_table[count + POS_PAR_WDC_BTT] = buffer[count];
} while ( count > 0 );
}
uint16_t wdc_get_btt_count ()
{
return par_table[0 + POS_PAR_WDC_BTT] | ( par_table[1 + POS_PAR_WDC_BTT] << 8 );
}
void wdc_set_btt_count ( uint16_t btt_count )
{
par_table[0 + POS_PAR_WDC_BTT] = (uint8_t)btt_count;
par_table[1 + POS_PAR_WDC_BTT] = ( btt_count >> 8 );
}
uint8_t wdc_add_btt_entry ( uint16_t cylinder, uint8_t head )
{
uint16_t btt_count = wdc_get_btt_count();
if ( btt_count < 120 ) {
/* +2 because btt_count is just the amount of bytes for the BTT - but in front of it, there are two bytes */
/* storing the amount of bytes for the BTT */
par_table[btt_count + 2 + POS_PAR_WDC_BTT] = ( cylinder >> 8 );
btt_count++;
par_table[btt_count + 2 + POS_PAR_WDC_BTT] = (uint8_t)cylinder;
btt_count++;
par_table[btt_count + 2 + POS_PAR_WDC_BTT] = (uint8_t)head;
btt_count++;
wdc_set_btt_count ( btt_count );
return 0;
}else {
return ERR_BTT_FULL;
}
}
uint8_t wdc_get_hdd_sectors ()
{
return par_table[18 + POS_PAR_WDC_PAR];
}
uint8_t wdc_get_hdd_heads ()
{
return par_table[17 + POS_PAR_WDC_PAR];
}
uint16_t wdc_get_hdd_cylinder ()
{
return ( par_table[16 + POS_PAR_WDC_PAR] << 8 ) | par_table[15 + POS_PAR_WDC_PAR];
}
void wdc_set_disk_invalid ()
{
uint8_t i;
valid_disk = 0;
for ( i = 0; i < 128; i++ ) {
par_table[i] = par_tab_new_dsk[i];
}
}
void wdc_set_disk_valid ()
{
uint32_t blocks;
uint16_t zw0, zw1;
blocks = (uint32_t)wdc_get_hdd_sectors() * (uint32_t)wdc_get_hdd_heads() * (uint32_t)wdc_get_hdd_cylinder()
- (uint32_t)wdc_get_hdd_sectors() * (uint32_t)wdc_get_hdd_heads();
zw0 = blocks / 65536;
zw1 = ( blocks % 65536 ) - 1;
valid_disk = 1;
par_table[42] = zw1;
par_table[43] = zw1 >> 8;
par_table[44] = zw0;
par_table[45] = zw0 >> 8;
par_table[46] = 0x01;
par_table[47] = 0x09;
par_table[48] = 0x00;
par_table[69] = 0x83;
par_table[70] = 0x59;
par_table[71] = 0x01;
par_table[73] = 0x6c;
par_table[91] = 0x33;
par_table[95] = 0x00;
}
void wdc_set_no_disk ()
{
uint8_t i;
valid_disk = 0;
for ( i = 0; i < 128; i++ ) {
par_table[i] = par_tab_no_dsk[i];
}
}
uint8_t wdc_get_disk_valid ()
{
return valid_disk;
}
uint8_t wdc_get_num_of_drvs ()
{
return par_table[49];
}
void wdc_set_initialized ( uint8_t num )
{
initialized = num;
}
uint8_t wdc_get_initialized ()
{
return initialized;
}
uint8_t wdc_get_btt_cleared ()
{
return btt_cleared;
}

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@ -1,65 +0,0 @@
/*-
* Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer
* in this position and unchanged.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/*
* $Id: wdc_par.h,v 1.7 2013/05/09 12:30:25 olivleh1 Exp $
*/
#ifndef WDC_PAR_H_
#define WDC_PAR_H_
extern void wdc_read_par_table ( uint8_t *buffer, uint16_t count );
extern void wdc_write_par_table ( uint8_t *buffer, uint16_t count );
extern void wdc_read_wdc_par ( uint8_t *buffer, uint16_t count );
extern void wdc_write_wdc_par ( uint8_t *buffer, uint16_t count );
extern void wdc_del_wdc_btt ();
extern void wdc_read_wdc_btt ( uint8_t *buffer, uint16_t count );
extern void wdc_write_wdc_btt ( uint8_t *buffer, uint16_t count );
extern uint16_t wdc_get_btt_count ();
extern uint8_t wdc_add_btt_entry ( uint16_t cylinder, uint8_t head );
extern uint8_t wdc_get_hdd_sectors ();
extern uint8_t wdc_get_hdd_heads ();
extern void wdc_set_disk_invalid ();
extern void wdc_set_disk_valid ();
extern uint8_t wdc_get_disk_valid ();
extern void wdc_set_no_disk ();
extern uint8_t wdc_get_num_of_drvs ();
extern void wdc_set_initialized ( uint8_t num );
extern uint8_t wdc_get_initialized ();
extern uint8_t wdc_get_btt_cleared ();
#define POS_PAR_VERSION 0 /* defines at which position in the PAR table the WDC version string starts */
#define POS_PAR_WDC_PAR 8 /* defines at which position in the PAR table the WDC parameter section starts */
#define POS_PAR_WDC_BTT 0x88 /* defines at which position in the PAR table the BTT section starts */
#define SIZE_PAR_VERSION 8 /* defines the length of the WDC version string */
#define SIZE_PAR_WDC_PAR 0x80 /* defines the length of the WDC parameter section */
#define SIZE_PAR_WDC_BTT 125 /* defines the length of the BTT section */
#endif /* WDC_PAR_H_ */

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@ -1,51 +0,0 @@
/*-
* Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer
* in this position and unchanged.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/*
* $Id: wdc_ram.c,v 1.7 2013/05/04 15:40:15 olivleh1 Exp $
*/
#include <avr/pgmspace.h>
#include "wdc_ram.h"
uint8_t wdc_ram[2048];
void wdc_write_data_to_ram ( uint8_t *buffer, uint16_t address, uint16_t count )
{
do {
count--;
wdc_ram[address + count] = buffer[count];
} while ( count > 0 );
}
void wdc_read_data_from_ram ( uint8_t *buffer, uint16_t address, uint16_t count )
{
do {
count--;
buffer[count] = wdc_ram[address + count];
} while ( count > 0 );
}

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@ -1,40 +0,0 @@
/*-
* Copyright (c) 2012, 2013 Oliver Lehmann
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer
* in this position and unchanged.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/*
* $Id: wdc_ram.h,v 1.7 2013/05/04 15:40:15 olivleh1 Exp $
*/
#ifndef WDC_RAM_H_
#define WDC_RAM_H_
extern void wdc_write_data_to_ram ( uint8_t *buffer, uint16_t address, uint16_t count );
extern void wdc_read_data_from_ram ( uint8_t *buffer, uint16_t address, uint16_t count );
#define convert_ram_address( x ) (( x ) - 0x2000 ) /* The S-RAM of the original WDC hardware starts at 0x2000. We use an array as RAM here and no direct RAM access */
#endif /* WDC_RAM_H_ */

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@ -1,66 +0,0 @@
align_func_params = true
align_func_proto_span = 2;
align_struct_init_span = 0
align_var_def_colon = true
align_var_def_span = 3
indent_columns = 4
indent_comma_paren = true
indent_paren_close = 1
indent_switch_case = 4
indent_with_tabs = 0
input_tab_size = 4
mod_full_brace_do = add
mod_full_brace_for = add
mod_full_brace_if = add
mod_full_brace_while = add
mod_paren_on_return = remove
mod_remove_extra_semicolon = true
newlines = lf
nl_after_brace_open = true
nl_after_func_body = 2
nl_after_semicolon = true
nl_brace_else = remove
nl_brace_while = remove
nl_collapse_empty_body = true
nl_do_brace = remove
nl_else_brace = remove
nl_end_of_file = remove
nl_enum_brace = remove
nl_fcall_brace = remove
nl_fdef_brace = add
nl_for_brace = remove
nl_func_var_def_blk = 1
nl_if_brace = remove
nl_struct_brace = remove
nl_switch_brace = remove
nl_union_brace = remove
nl_while_brace = remove
sp_after_cast = remove
sp_after_comma = force
sp_after_ptr_star = remove
sp_after_sparen = force
sp_arith = force
sp_assign = force
sp_assign = force
sp_before_ptr_star = force
sp_before_sparen = force
sp_bool = force
sp_compare = force
sp_fparen_brace = force
sp_func_call_paren = add
sp_func_call_paren_empty = remove
sp_func_def_paren = force
sp_inside_braces = force
sp_inside_braces_enum = force
sp_inside_braces_struct = remove
sp_inside_fparen = force
sp_inside_fparens = remove
sp_inside_paren = force
sp_inside_paren_cast = remove
sp_inside_sparen = force
sp_paren_brace = force
sp_return_paren = force
sp_sizeof_paren = remove
sp_sparen_brace = force
nl_assign_leave_one_liners = true