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even more work

This commit is contained in:
Oliver Lehmann 2012-06-17 13:21:55 +00:00
parent e27aefec5e
commit 307e662ae8
9 changed files with 70 additions and 98 deletions
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2
P8000_WDC_Emulator/P8000_WDC_Emulator/Debug/Makefile
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@ -138,7 +138,7 @@ OUTPUT_FILE_DEP:= ./makedep.mk
./%.o: .././%.c ./%.o: .././%.c
@echo Building file: $< @echo Building file: $<
@echo Invoking: AVR/GNU C Compiler : (AVR_8_bit_GNU_Toolchain_3.4.0_663) 4.6.2 @echo Invoking: AVR/GNU C Compiler : (AVR_8_bit_GNU_Toolchain_3.4.0_663) 4.6.2
$(QUOTE)C:\Program Files (x86)\Atmel\Atmel Studio 6.0\extensions\Atmel\AVRGCC\3.4.0.65\AVRToolchain\bin\avr-gcc.exe$(QUOTE) -funsigned-char -funsigned-bitfields -O1 -ffunction-sections -fpack-struct -fshort-enums -c -save-temps -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -mmcu=atmega1284p -o"$@" "$<" $(QUOTE)C:\Program Files (x86)\Atmel\Atmel Studio 6.0\extensions\Atmel\AVRGCC\3.4.0.65\AVRToolchain\bin\avr-gcc.exe$(QUOTE) -funsigned-char -funsigned-bitfields -O1 -ffunction-sections -fpack-struct -fshort-enums -Wall -Wundef -Werror -pedantic -pedantic-errors -c -save-temps -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -mmcu=atmega1284p -o"$@" "$<"
@echo Finished building: $< @echo Finished building: $<

5
P8000_WDC_Emulator/P8000_WDC_Emulator/P8000_WDC_Emulator.cproj
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@ -54,6 +54,11 @@
<avrgcc.compiler.optimization.PrepareFunctionsForGarbageCollection>True</avrgcc.compiler.optimization.PrepareFunctionsForGarbageCollection> <avrgcc.compiler.optimization.PrepareFunctionsForGarbageCollection>True</avrgcc.compiler.optimization.PrepareFunctionsForGarbageCollection>
<avrgcc.compiler.optimization.PackStructureMembers>True</avrgcc.compiler.optimization.PackStructureMembers> <avrgcc.compiler.optimization.PackStructureMembers>True</avrgcc.compiler.optimization.PackStructureMembers>
<avrgcc.compiler.optimization.AllocateBytesNeededForEnum>True</avrgcc.compiler.optimization.AllocateBytesNeededForEnum> <avrgcc.compiler.optimization.AllocateBytesNeededForEnum>True</avrgcc.compiler.optimization.AllocateBytesNeededForEnum>
<avrgcc.compiler.warnings.AllWarnings>True</avrgcc.compiler.warnings.AllWarnings>
<avrgcc.compiler.warnings.Undefined>True</avrgcc.compiler.warnings.Undefined>
<avrgcc.compiler.warnings.WarningsAsErrors>True</avrgcc.compiler.warnings.WarningsAsErrors>
<avrgcc.compiler.warnings.Pedantic>True</avrgcc.compiler.warnings.Pedantic>
<avrgcc.compiler.warnings.PedanticWarningsAsErrors>True</avrgcc.compiler.warnings.PedanticWarningsAsErrors>
<avrgcc.compiler.miscellaneous.OtherFlags /> <avrgcc.compiler.miscellaneous.OtherFlags />
<avrgcc.compiler.miscellaneous.DoNotDeleteTemporaryFiles>True</avrgcc.compiler.miscellaneous.DoNotDeleteTemporaryFiles> <avrgcc.compiler.miscellaneous.DoNotDeleteTemporaryFiles>True</avrgcc.compiler.miscellaneous.DoNotDeleteTemporaryFiles>
<avrgcc.linker.libraries.Libraries> <avrgcc.linker.libraries.Libraries>

3
P8000_WDC_Emulator/P8000_WDC_Emulator/uart.c
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@ -174,6 +174,7 @@ void uart_puts_p(PGM_P str)
uint8_t uart_getc() uint8_t uart_getc()
{ {
uint8_t b;
/* wait until receive buffer is full */ /* wait until receive buffer is full */
#if USE_SLEEP #if USE_SLEEP
uint8_t sreg = SREG; uint8_t sreg = SREG;
@ -187,7 +188,7 @@ uint8_t uart_getc()
while(!(UCSRA & (1 << RXC))); while(!(UCSRA & (1 << RXC)));
#endif #endif
uint8_t b = UDR; b = UDR;
if(b == '\r') if(b == '\r')
b = '\n'; b = '\n';

4
P8000_WDC_Emulator/P8000_WDC_Emulator/wdc_config.h
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@ -26,7 +26,7 @@
*/ */
/* /*
* $Id: wdc_config.h,v 1.18 2012/06/16 23:41:42 olivleh1 Exp $ * $Id: wdc_config.h,v 1.19 2012/06/17 13:21:55 olivleh1 Exp $
*/ */
@ -121,7 +121,7 @@
#define MMC_MULTIBLOCK 1 #define MMC_MULTIBLOCK 1
#define MEASURE_DISK_PERFORMANCE 1 #define MEASURE_DISK_PERFORMANCE 1
//#undef MEASURE_DISK_PERFORMANCE #undef MEASURE_DISK_PERFORMANCE
#define DEBUG 1 #define DEBUG 1

11
P8000_WDC_Emulator/P8000_WDC_Emulator/wdc_drv_mmc.c
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@ -26,7 +26,7 @@
*/ */
/* /*
* $Id: wdc_drv_mmc.c,v 1.19 2012/06/16 23:41:42 olivleh1 Exp $ * $Id: wdc_drv_mmc.c,v 1.20 2012/06/17 13:21:55 olivleh1 Exp $
*/ */
#include <avr/io.h> #include <avr/io.h>
@ -179,7 +179,7 @@ uint8_t mmc_init ()
{ {
uint16_t t16 = 0; uint16_t t16 = 0;
uint8_t a; uint8_t a;
uint8_t cmd[6];
for ( a = 0; a < 200; a++ ) { for ( a = 0; a < 200; a++ ) {
nop(); nop();
}; };
@ -198,7 +198,12 @@ uint8_t mmc_init ()
/* /*
* send CMD0 * send CMD0
*/ */
uint8_t cmd[] = {CMD0, 0x00, 0x00, 0x00, 0x00, 0x95}; cmd[0] = CMD0;
cmd[1] = 0x00;
cmd[2] = 0x00;
cmd[3] = 0x00;
cmd[4] = 0x00;
cmd[5] = 0x95;
while ( mmc_cmd ( cmd ) != 1 ) { while ( mmc_cmd ( cmd ) != 1 ) {
if ( t16++ > 1000 ) { if ( t16++ > 1000 ) {
mmc_disable(); mmc_disable();

60
P8000_WDC_Emulator/P8000_WDC_Emulator/wdc_drv_pata.c
View File

@ -26,7 +26,7 @@
*/ */
/* /*
* $Id: wdc_drv_pata.c,v 1.8 2012/06/16 23:41:42 olivleh1 Exp $ * $Id: wdc_drv_pata.c,v 1.9 2012/06/17 13:21:55 olivleh1 Exp $
*/ */
#include "wdc_config.h" #include "wdc_config.h"
@ -39,6 +39,7 @@
uint8_t pata_bsy(); uint8_t pata_bsy();
uint8_t pata_rdy(); uint8_t pata_rdy();
uint8_t pata_drq(); uint8_t pata_drq();
uint8_t pata_err();
void ata_identify(); void ata_identify();
void pata_set_highbyte ( uint8_t byte ); void pata_set_highbyte ( uint8_t byte );
void pata_set_lowbyte ( uint8_t byte ); void pata_set_lowbyte ( uint8_t byte );
@ -60,6 +61,7 @@ void pata_read_bytes ( uint8_t *buffer, uint16_t bytes );
#define PATA_W_DEVICE_CONTROL_REGISTER 0x0B /* 0b10011 */ #define PATA_W_DEVICE_CONTROL_REGISTER 0x0B /* 0b10011 */
#define PATA_R_STATUS_REGISTER 0x0F /* 0b01111 */ #define PATA_R_STATUS_REGISTER 0x0F /* 0b01111 */
#define PATA_R_ALTERNATE_STATUS_REGISTER 0x0B /* 0b10011 */ #define PATA_R_ALTERNATE_STATUS_REGISTER 0x0B /* 0b10011 */
#define PATA_R_ERROR_REGISTER 0x0C /* 0b01100 */
#define PATA_W_FEATURE_REGISTER 0x0C /* 0b01100 */ #define PATA_W_FEATURE_REGISTER 0x0C /* 0b01100 */
#define PATA_W_COMMAND_REGISTER 0x0F /* 0b01111 */ #define PATA_W_COMMAND_REGISTER 0x0F /* 0b01111 */
@ -93,6 +95,11 @@ uint8_t pata_drq()
return ( read_io_register ( PATA_R_STATUS_REGISTER ) & ATA_STAT_DRQ ) ? 1 : 0; return ( read_io_register ( PATA_R_STATUS_REGISTER ) & ATA_STAT_DRQ ) ? 1 : 0;
} }
uint8_t pata_err()
{
return ( read_io_register ( PATA_R_STATUS_REGISTER ) & ATA_STAT_ERR ) ? 1 : 0;
}
void set_io_register ( uint8_t ioreg ) void set_io_register ( uint8_t ioreg )
{ {
if ( ! ( ioreg & ( 1 << 0 ) ) ) if ( ! ( ioreg & ( 1 << 0 ) ) )
@ -278,6 +285,9 @@ void ata_identify()
uart_putc ( word[i] & 0x00FF ); uart_putc ( word[i] & 0x00FF );
} }
uart_putc ( '\n' ); uart_putc ( '\n' );
uart_puts_p ( PSTR ( "Capabilities: " ) );
uart_putw_dec ( word[49] );
uart_putc ( '\n' );
uart_puts_p ( PSTR ( "Number of current logical cylinders: " ) ); uart_puts_p ( PSTR ( "Number of current logical cylinders: " ) );
uart_putw_dec ( word[54] ); uart_putw_dec ( word[54] );
uart_putc ( '\n' ); uart_putc ( '\n' );
@ -293,6 +303,9 @@ void ata_identify()
uart_puts_p ( PSTR ( "Total number of user addressable sectors (LBA mode only): " ) ); uart_puts_p ( PSTR ( "Total number of user addressable sectors (LBA mode only): " ) );
uart_putdw_dec ( word[60] | ( uint32_t ) word[61] << 16 ); uart_putdw_dec ( word[60] | ( uint32_t ) word[61] << 16 );
uart_putc ( '\n' ); uart_putc ( '\n' );
uart_puts_p ( PSTR ( "Minimum PIO transfer cycle time without flow control: " ) );
uart_putdw_dec ( word[67] );
uart_puts_p ( PSTR ( "ns\n" ) );
} }
@ -301,14 +314,10 @@ void ata_identify()
* Public functions * Public functions
*/ */
uint8_t data2_buffer[512];
//uint8_t data3_buffer[512];
uint8_t pata_init () uint8_t pata_init ()
{ {
uint16_t a;
// is needed for some disks (for example Maxtor 6L080J4) /* is needed for some disks (for example Maxtor 6L080J4) */
_delay_ms ( 200 ); _delay_ms ( 200 );
uart_puts_p ( PSTR ( "Init start\n" ) ); uart_puts_p ( PSTR ( "Init start\n" ) );
@ -318,25 +327,30 @@ uint8_t pata_init ()
write_io_register ( PATA_RW_DEVICE_HEAD_REGISTER, ATA_LBA_DRIVE_0 ); write_io_register ( PATA_RW_DEVICE_HEAD_REGISTER, ATA_LBA_DRIVE_0 );
while ( ( !pata_rdy() ) & pata_bsy() ); while ( ( !pata_rdy() ) & pata_bsy() );
/* /*recalibrate*/
write_io_register ( PATA_W_COMMAND_REGISTER, CMD_RECALIBRATE );
while ( pata_bsy() );
/* CHS Mode, Software Reset, PIO mode without IORDY
write_io_register ( PATA_RW_DEVICE_HEAD_REGISTER, 0 );
while ( ( pata_drq() ) & pata_bsy() );
write_io_register ( PATA_W_DEVICE_CONTROL_REGISTER, 0x40 | 0x20 );
_delay_ms(20);
write_io_register ( PATA_W_DEVICE_CONTROL_REGISTER, 0x20 );
_delay_ms(20);
while ( ( !pata_rdy() ) & pata_bsy() );
write_io_register ( PATA_W_FEATURE_REGISTER, 3 ); write_io_register ( PATA_W_FEATURE_REGISTER, 3 );
write_io_register ( PATA_RW_SECTOR_COUNT_REGISTER, 1 ); write_io_register ( PATA_RW_SECTOR_COUNT_REGISTER, 1 );
write_io_register ( PATA_W_COMMAND_REGISTER, CMD_SET_FEATURES ); write_io_register ( PATA_W_COMMAND_REGISTER, CMD_SET_FEATURES );
while ( pata_bsy() ); while ( pata_bsy() );
*/ */
/*recalibrate*/
write_io_register ( PATA_W_COMMAND_REGISTER, CMD_RECALIBRATE );
while ( pata_bsy() );
uart_puts_p ( PSTR ( "disk is now ready\n" ) ); uart_puts_p ( PSTR ( "disk is now ready\n" ) );
// ata_identify(); ata_identify();
pata_read_block(0,data2_buffer);
for ( a = 0 ; a < 512 ; a++ )
uart_putc_hex ( data2_buffer[a] );
while(1);
return 0; return 0;
} }
@ -352,7 +366,7 @@ uint8_t pata_write_block ( uint32_t addr, uint8_t *buffer )
uint8_t pata_read_multiblock ( uint32_t addr, uint8_t *buffer, uint8_t numblocks ) uint8_t pata_read_multiblock ( uint32_t addr, uint8_t *buffer, uint8_t numblocks )
{ {
write_io_register ( PATA_RW_SECTOR_COUNT_REGISTER, numblocks ); write_io_register ( PATA_RW_SECTOR_COUNT_REGISTER, numblocks );
write_io_register ( PATA_RW_SECTOR_NUMBER_REGISTER, ( uint8_t ) addr ); write_io_register ( PATA_RW_SECTOR_NUMBER_REGISTER, ( uint8_t ) addr );
@ -364,10 +378,7 @@ uint8_t pata_read_multiblock ( uint32_t addr, uint8_t *buffer, uint8_t numblocks
pata_read_bytes ( buffer, numblocks * PATA_BLOCKLEN ); pata_read_bytes ( buffer, numblocks * PATA_BLOCKLEN );
read_io_register ( PATA_R_ALTERNATE_STATUS_REGISTER ); return pata_err();
read_io_register ( PATA_R_STATUS_REGISTER );
return 0;
} }
uint8_t pata_write_multiblock ( uint32_t addr, uint8_t *buffer, uint8_t numblocks ) uint8_t pata_write_multiblock ( uint32_t addr, uint8_t *buffer, uint8_t numblocks )
@ -386,8 +397,5 @@ uint8_t pata_write_multiblock ( uint32_t addr, uint8_t *buffer, uint8_t numblock
/* wait until drive completed write */ /* wait until drive completed write */
while(pata_bsy()); while(pata_bsy());
read_io_register ( PATA_R_ALTERNATE_STATUS_REGISTER ); return pata_err();
read_io_register ( PATA_R_STATUS_REGISTER );
return 0;
} }

61
P8000_WDC_Emulator/P8000_WDC_Emulator/wdc_drv_pata.h
View File

@ -26,7 +26,7 @@
*/ */
/* /*
* $Id: wdc_drv_pata.h,v 1.6 2012/06/16 19:34:39 olivleh1 Exp $ * $Id: wdc_drv_pata.h,v 1.7 2012/06/17 13:21:55 olivleh1 Exp $
*/ */
#ifndef WDC_DRV_PATA_H_ #ifndef WDC_DRV_PATA_H_
@ -40,69 +40,20 @@ extern uint8_t pata_write_block ( uint32_t addr, uint8_t *buffer );
extern uint8_t pata_read_multiblock ( uint32_t addr, uint8_t *buffer, uint8_t numblocks ); extern uint8_t pata_read_multiblock ( uint32_t addr, uint8_t *buffer, uint8_t numblocks );
extern uint8_t pata_write_multiblock ( uint32_t addr, uint8_t *buffer, uint8_t numblocks ); extern uint8_t pata_write_multiblock ( uint32_t addr, uint8_t *buffer, uint8_t numblocks );
#define ATA_STAT_BSY 0x80 /* ATA busy */
#define ATA_STAT_BSY 0x80 // ATA busy #define ATA_STAT_RDY 0x40 /* ATA ready */
#define ATA_STAT_RDY 0x40 // ATA ready #define ATA_STAT_DRQ 0x08 /* ATA data request */
#define ATA_STAT_DF 0x20 // ATA device fault #define ATA_STAT_ERR 0x01 /* ATA error */
#define ATA_STAT_SKC 0x10 // ATA seek complete
#define ATA_STAT_DRQ 0x08 // ATA data request
#define ATA_STAT_CORR 0x04 // ATA corrected
#define ATA_STAT_IDX 0x02 // ATA index
#define ATA_STAT_ERR 0x01 // ATA error
#define ATA_LBA_DRIVE_0 0xE0 #define ATA_LBA_DRIVE_0 0xE0
#define ATA_LBA_DRIVE_1 0xF0
//ATA commands (from ATA-3), /* implemented ATA commands */
#define CMD_CFA_ERASE_SECTORS 0xC0
#define CMD_CFA_REQUEST_EXT_ERR_CODE 0x03
#define CMD_CFA_TRANSLATE_SECTOR 0x87
#define CMD_CFA_WRITE_MULTIPLE_WO_ERASE 0xCD
#define CMD_CFA_WRITE_SECTORS_WO_ERASE 0x38
#define CMD_CHECK_POWER_MODE1 0xE5
#define CMD_CHECK_POWER_MODE2 0x98
#define CMD_DEVICE_RESET 0x08
#define CMD_EXECUTE_DEVICE_DIAGNOSTIC 0x90
#define CMD_FLUSH_CACHE 0xE7
#define CMD_FORMAT_TRACK 0x50
#define CMD_IDENTIFY_DEVICE 0xEC #define CMD_IDENTIFY_DEVICE 0xEC
#define CMD_IDENTIFY_DEVICE_PACKET 0xA1
#define CMD_IDENTIFY_PACKET_DEVICE 0xA1
#define CMD_IDLE1 0xE3
#define CMD_IDLE2 0x97
#define CMD_IDLE_IMMEDIATE1 0xE1
#define CMD_IDLE_IMMEDIATE2 0x95
#define CMD_INITIALIZE_DRIVE_PARAMETERS 0x91
#define CMD_INITIALIZE_DEVICE_PARAMETERS 0x91
#define CMD_NOP 0x00
#define CMD_PACKET 0xA0
#define CMD_READ_BUFFER 0xE4
#define CMD_READ_DMA 0xC8
#define CMD_READ_DMA_QUEUED 0xC7
#define CMD_READ_MULTIPLE 0xC4
#define CMD_READ_SECTORS 0x20 #define CMD_READ_SECTORS 0x20
#define CMD_READ_VERIFY_SECTORS 0x40
#define CMD_RECALIBRATE 0x10 #define CMD_RECALIBRATE 0x10
#define CMD_SEEK 0x70
#define CMD_SET_FEATURES 0xEF #define CMD_SET_FEATURES 0xEF
#define CMD_SET_MULTIPLE_MODE 0xC6
#define CMD_SLEEP1 0xE6
#define CMD_SLEEP2 0x99
#define CMD_STANDBY1 0xE2
#define CMD_STANDBY2 0x96
#define CMD_STANDBY_IMMEDIATE1 0xE0
#define CMD_STANDBY_IMMEDIATE2 0x94
#define CMD_WRITE_BUFFER 0xE8
#define CMD_WRITE_DMA 0xCA
#define CMD_WRITE_DMA_QUEUED 0xCC
#define CMD_WRITE_MULTIPLE 0xC5
#define CMD_WRITE_SECTORS 0x30 #define CMD_WRITE_SECTORS 0x30
#define CMD_WRITE_VERIFY 0x3C
#define PATA_BLOCKLEN 512 #define PATA_BLOCKLEN 512
// CB_DH bits 7-4 OF THE DEVICE/HEAD REGISTER
#define ATA_DH_DEV0 0xE0 // select device 0 LBA MODE
#define ATA_DH_DEV1 0xF0 // select device 1 LBA MODE
#endif /* WDC_DRV_PATA_H_ */ #endif /* WDC_DRV_PATA_H_ */

17
P8000_WDC_Emulator/P8000_WDC_Emulator/wdc_if_disk_perf.c
View File

@ -26,7 +26,7 @@
*/ */
/* /*
* $Id: wdc_if_disk_perf.c,v 1.7 2012/06/16 23:41:42 olivleh1 Exp $ * $Id: wdc_if_disk_perf.c,v 1.8 2012/06/17 13:21:55 olivleh1 Exp $
*/ */
#include <avr/io.h> #include <avr/io.h>
@ -42,7 +42,7 @@
#include "uart.h" #include "uart.h"
#ifdef MEASURE_DISK_PERFORMANCE #ifdef MEASURE_DISK_PERFORMANCE
#define BLOCKNO 300000 #define BLOCKNO 0
extern uint32_t overflow; extern uint32_t overflow;
@ -109,7 +109,7 @@ void test_write512(uint8_t numblocks, uint8_t nr_of_tests)
uart_puts_p ( PSTR ( "Test Write 5000 512B-Blocks with Singleblock-Write (512B Blocksize):" ) ); uart_puts_p ( PSTR ( "Test Write 5000 512B-Blocks with Singleblock-Write (512B Blocksize):" ) );
uart_putc ( '\n' ); uart_putc ( '\n' );
memset ( &data_buffer[0], 0x11, WDC_BLOCKLEN * numblocks ); memset ( &data_buffer[0], 0xEF, WDC_BLOCKLEN * numblocks );
for ( i8 = 0; i8 < nr_of_tests; i8++ ) { for ( i8 = 0; i8 < nr_of_tests; i8++ ) {
blockno = BLOCKNO; blockno = BLOCKNO;
for ( starttime = overflow; blockno < ( BLOCKNO + 5000 ); blockno++ ) { for ( starttime = overflow; blockno < ( BLOCKNO + 5000 ); blockno++ ) {
@ -131,7 +131,7 @@ void test_read512(uint8_t numblocks, uint8_t nr_of_tests)
uint32_t starttime; uint32_t starttime;
uint32_t blockno = 0; uint32_t blockno = 0;
uint8_t i8, errorcode; uint8_t i8, errorcode;
uint16_t a; /* uint16_t a; */
uart_puts_p ( PSTR ( "Test Read 5000 512B-Blocks with Singleblock-Read (512B Blocksize):" ) ); uart_puts_p ( PSTR ( "Test Read 5000 512B-Blocks with Singleblock-Read (512B Blocksize):" ) );
uart_putc ( '\n' ); uart_putc ( '\n' );
@ -140,11 +140,11 @@ void test_read512(uint8_t numblocks, uint8_t nr_of_tests)
blockno = BLOCKNO; blockno = BLOCKNO;
for ( starttime = overflow; blockno < ( BLOCKNO + 5000 ); blockno++ ) { for ( starttime = overflow; blockno < ( BLOCKNO + 5000 ); blockno++ ) {
errorcode = wdc_read_sector ( blockno, data_buffer ); errorcode = wdc_read_sector ( blockno, data_buffer );
/*
for ( a = 0 ; a < 512 ; a++ ) for ( a = 0 ; a < 512 ; a++ )
uart_putc_hex ( data_buffer[a] ); uart_putc_hex ( data_buffer[a] );
uart_putc ( '\n' ); uart_putc ( '\n' );
*/
if ( errorcode ) { if ( errorcode ) {
break; break;
} }
@ -172,7 +172,8 @@ void measure_performance()
uart_puts_p ( PSTR ( "Timer is initialized with a Prescaler 8" ) ); uart_puts_p ( PSTR ( "Timer is initialized with a Prescaler 8" ) );
uart_putc ( '\n' ); uart_putc ( '\n' );
// test_write512(numblocks,nr_of_tests); test_write512(numblocks,nr_of_tests);
/*
test_read512(numblocks,nr_of_tests); test_read512(numblocks,nr_of_tests);
test_write512(numblocks,nr_of_tests); test_write512(numblocks,nr_of_tests);
test_read4k(numblocks,nr_of_tests); test_read4k(numblocks,nr_of_tests);
@ -185,7 +186,7 @@ void measure_performance()
test_read512(numblocks,nr_of_tests); test_read512(numblocks,nr_of_tests);
test_write4k(numblocks,nr_of_tests); test_write4k(numblocks,nr_of_tests);
test_write512(numblocks,nr_of_tests); test_write512(numblocks,nr_of_tests);
*/
uart_puts_p ( PSTR ( "End" ) ); uart_puts_p ( PSTR ( "End" ) );
uart_putc ( '\n' ); uart_putc ( '\n' );

5
P8000_WDC_Emulator/P8000_WDC_Emulator/wdc_par.c
View File

@ -26,7 +26,7 @@
*/ */
/* /*
* $Id: wdc_par.c,v 1.5 2012/06/12 17:34:14 olivleh1 Exp $ * $Id: wdc_par.c,v 1.6 2012/06/17 13:21:55 olivleh1 Exp $
*/ */
#include <avr/pgmspace.h> #include <avr/pgmspace.h>
@ -205,8 +205,9 @@ uint16_t wdc_get_hdd_cylinder()
void wdc_set_disk_invalid() void wdc_set_disk_invalid()
{ {
valid_disk = 0;
uint8_t i; uint8_t i;
valid_disk = 0;
for ( i = 0; i < 128; i++ ) for ( i = 0; i < 128; i++ )
par_table[i] = par_tab_new_dsk[i]; par_table[i] = par_tab_new_dsk[i];
} }