first work on PATA
This commit is contained in:
Oliver Lehmann
parent
39eed1c045
commit
2435c37f7e
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@ -174,7 +174,7 @@ T 67100 33100 9 8 1 0 0 0 1
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T 68500 33100 9 8 1 0 0 0 1
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1
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T 71000 33400 9 7 1 0 0 0 1
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$Revision: 1.14 $ / $Date: 2012/06/13 20:17:45 $
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$Revision: 1.15 $ / $Date: 2012/06/15 22:42:42 $
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T 71000 33100 9 8 1 0 0 0 1
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Oliver Lehmann <lehmann@ans-netz.de>
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N 50600 59400 51200 59400 4
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@ -427,7 +427,7 @@ C 68600 50100 1 90 0 resistor-1.sym
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T 68200 50400 5 10 0 0 90 0 1
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device=RESISTOR
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T 68700 50600 5 10 1 1 0 0 1
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refdes=R5
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refdes=1R5
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T 68700 50400 5 10 1 1 0 0 1
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value=330
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}
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@ -941,14 +941,14 @@ C 45100 50300 1 0 1 busripper-1.sym
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T 45100 50700 5 8 0 0 0 6 1
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device=none
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T 45200 50400 5 10 1 1 0 0 1
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pinlabel=DA2
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pinlabel=DA1
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}
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C 45100 50000 1 0 1 busripper-1.sym
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{
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T 45100 50400 5 8 0 0 0 6 1
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device=none
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T 45200 50100 5 10 1 1 0 0 1
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pinlabel=DA1
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pinlabel=DA2
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}
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C 45100 56300 1 0 1 busripper-1.sym
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{
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@ -983,7 +983,7 @@ C 31300 39900 1 0 0 switch-dip4-1.sym
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T 32700 41275 5 8 0 0 0 0 1
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device=SWITCH_DIP4
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T 31600 41450 5 10 1 1 0 0 1
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refdes=U?
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refdes=SW1
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}
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C 37300 38400 1 0 1 74245-1.sym
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{
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@ -1000,7 +1000,7 @@ C 33900 38900 1 180 0 resistorpack5-1.sym
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T 33800 37500 5 10 0 0 180 0 1
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device=RESISTORPACK_5
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T 33800 37700 5 10 1 1 180 0 1
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refdes=R7
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refdes=R6
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T 34000 38100 5 10 1 1 0 0 1
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netname=4k7
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}
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@ -1255,7 +1255,7 @@ C 71200 38700 1 270 1 resistor-1.sym
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T 71600 39000 5 10 0 0 270 6 1
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device=RESISTOR
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T 71100 39300 5 10 1 1 90 6 1
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refdes=R6
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refdes=2R5
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T 71600 39300 5 10 1 1 90 6 1
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value=330
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}
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@ -1847,7 +1847,7 @@ pinlabel=\_RESET\_
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}
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N 51200 61700 55000 61700 4
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N 55000 46900 55000 61700 4
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N 55000 46900 67000 46900 4
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N 55000 46900 70500 46900 4
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N 67000 46900 67000 46000 4
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C 35300 39800 1 90 0 5V-plus-1.sym
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C 35300 39500 1 90 0 5V-plus-1.sym
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@ -1917,18 +1917,6 @@ device=none
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T 38300 39200 5 10 1 1 0 0 1
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pinlabel=PA7
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}
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N 70500 40400 70500 42000 4
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N 70500 42900 70500 43400 4
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C 70300 43400 1 0 0 5V-plus-1.sym
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C 70600 42000 1 90 0 resistor-1.sym
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{
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T 70200 42300 5 10 0 0 90 0 1
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device=RESISTOR
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T 70300 42200 5 10 1 1 90 0 1
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refdes=2R3
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T 70800 42200 5 10 1 1 90 0 1
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value=10k
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}
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N 52300 45500 52300 41500 4
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C 37600 60100 1 0 1 7403-1.sym
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{
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@ -1976,3 +1964,4 @@ T 40300 60300 5 10 0 0 0 6 1
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slot=2
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}
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N 37600 60800 39200 60800 4
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N 70500 46900 70500 40400 4
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@ -26,7 +26,7 @@
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*/
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/*
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* $Id: wdc_drv_pata.c,v 1.3 2012/06/14 20:24:24 olivleh1 Exp $
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* $Id: wdc_drv_pata.c,v 1.4 2012/06/15 22:42:42 olivleh1 Exp $
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*/
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#include "wdc_config.h"
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@ -34,6 +34,15 @@
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#include <util/delay.h>
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#include "wdc_avr.h"
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#include "uart.h"
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#include "wdc_drv_pata.h"
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uint8_t pata_bsy();
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uint8_t pata_rdy();
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uint8_t pata_drq();
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void pata_cmd ( uint8_t cmd );
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void ata_identify();
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#define ata_ctl_high() ata_cs0_disable();ata_cs1_disable();ata_da0_disable();ata_da1_disable();ata_da2_disable();
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void pata_set_highbyte ( uint8_t byte )
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{
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@ -41,7 +50,7 @@ void pata_set_highbyte ( uint8_t byte )
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enable_atalatch();
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nop();
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nop();
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disable_atalatch();
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init_addressdecoder();
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}
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void pata_set_lowbyte ( uint8_t byte )
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@ -52,23 +61,377 @@ void pata_set_lowbyte ( uint8_t byte )
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void pata_send_data()
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{
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enable_rdwrtoata();
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_delay_us(10);
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// disable_rdwrtoata();
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_delay_us ( 10 );
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init_addressdecoder();
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}
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uint8_t pata_get_lowbyte ()
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{
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nop();
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nop();
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return port_data_get();
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}
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uint8_t pata_get_highbyte ()
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{
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uint8_t byte;
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enable_atalatch();
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nop();
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nop();
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nop();
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byte = port_data_get();
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init_addressdecoder();
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return byte;
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}
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uint8_t pata_read_byte()
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{
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uint8_t byte;
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configure_port_data_read();
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ata_rd_enable();
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enable_rdwrtoata();
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_delay_us ( 1 );
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byte = pata_get_lowbyte();
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init_addressdecoder();
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ata_rd_disable();
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return byte;
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}
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void pata_write_byte ( uint8_t byte )
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{
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configure_port_data_write();
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pata_set_lowbyte ( byte );
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enable_rdwrtoata();
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ata_wr_enable();
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_delay_us ( 1 );
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ata_wr_disable();
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init_addressdecoder();
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}
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uint8_t ata_get_status_byte ( void )
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{
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uint8_t byte;
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ata_cs0_enable();
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byte = pata_read_byte();
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ata_ctl_high();
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return byte;
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}
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uint8_t ata_get_alt_status_byte ( void )
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{
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uint8_t byte;
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ata_cs1_enable();
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ata_da0_enable();
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byte = pata_read_byte();
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ata_ctl_high();
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return byte;
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}
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uint16_t pata_read_word ( uint8_t ofs, uint8_t count )
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{
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uint16_t word;
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uint8_t byte_l;
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uint8_t byte_h;
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uint8_t c = 0;
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ata_da0_enable();
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ata_da1_enable();
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ata_da2_enable();
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ata_cs0_enable();
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do {
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ata_rd_enable();
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enable_rdwrtoata();
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nop();
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nop();
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nop();
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byte_l = port_data_get();
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disable_rdwrtoata();
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enable_atalatch();
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nop();
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nop();
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nop();
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byte_h = port_data_get();
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disable_atalatch();
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ata_rd_disable();
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if ( count && ( c >= ofs ) ) {
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uart_putc ( byte_h );
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uart_putc ( byte_l );
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count--;
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}
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} while ( ++c );
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ata_ctl_high();
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word = byte_h << 8;
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word |= byte_l;
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return ( word );
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}
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uint16_t pata_read_single_word ()
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{
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uint16_t word;
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uint8_t byte_l;
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uint8_t byte_h;
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ata_da0_enable();
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ata_da1_enable();
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ata_da2_enable();
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ata_cs0_enable();
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ata_rd_enable();
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enable_rdwrtoata();
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nop();
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nop();
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nop();
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byte_l = port_data_get();
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disable_rdwrtoata();
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enable_atalatch();
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nop();
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nop();
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nop();
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byte_h = port_data_get();
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disable_atalatch();
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ata_rd_disable();
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ata_ctl_high();
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word = byte_h << 8;
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word |= byte_l;
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return ( word );
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}
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uint8_t pata_init ()
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{
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uart_putc('1');
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/* test write */
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configure_port_data_write();
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ata_wr_enable();
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pata_set_highbyte ( 0xff );
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pata_set_lowbyte ( 0x00 );
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pata_send_data();
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// ata_wr_disable();
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// is needed for some disks (for example Maxtor 6L080J4)
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_delay_ms ( 100 );
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uart_puts_p ( PSTR ( "Init start\n" ) );
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while ( ( !pata_rdy() ) & pata_bsy() );
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uart_putc_hex ( ata_get_status_byte() );
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/*device register*/
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ata_da0_enable();
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ata_cs0_enable();
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#ifdef PIO
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pata_write_byte ( 0 ); // Drive 0, PIO
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#else
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pata_write_byte ( 0xE0 ); // Drive 0, LBA
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#endif
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ata_ctl_high();
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#ifdef PIO
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while ( pata_bsy() );
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//device control
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ata_da0_enable();
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ata_cs1_enable();
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pata_write_byte ( 0x40 | 0x20 ); // reset + no interrupt
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ata_ctl_high();
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_delay_ms ( 20 );
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ata_da0_enable();
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ata_cs1_enable();
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pata_write_byte ( 0x20 ); // no interrupt
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ata_ctl_high();
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_delay_ms ( 20 );
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while ( ( !pata_rdy() ) & pata_bsy() );
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//feature register
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ata_da1_enable();
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ata_da2_enable();
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ata_cs0_enable();
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pata_write_byte ( 3 ); // PIO
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ata_ctl_high();
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//sector count
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ata_da0_enable();
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ata_da2_enable();
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ata_cs0_enable();
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pata_write_byte ( 1 );
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ata_ctl_high();
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//command
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ata_cs0_enable();
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pata_write_byte ( 0xEF ); // Set Features
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ata_ctl_high();
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#else
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while ( ( !pata_rdy() ) & pata_bsy() );
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/*command*/
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ata_cs0_enable();
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pata_write_byte ( 0x10 ); // Recalibrate
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ata_ctl_high();
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#endif
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while ( pata_bsy() );
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uart_puts_p ( PSTR ( "disk is now ready\n" ) );
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ata_identify();
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return 1;
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}
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void ata_identify()
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{
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uint32_t dword;
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uint16_t word;
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uint8_t byte_l,byte_h;
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/*command*/
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while ( pata_bsy() );
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ata_cs0_enable();
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pata_write_byte ( 0xEc ); // Identify
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ata_ctl_high();
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/* Wait for BSY goes low and DRQ goes high */
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while ( ( ata_get_status_byte() & ( ATA_STAT_BSY | ATA_STAT_DRQ ) ) != ATA_STAT_DRQ );
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word = pata_read_single_word(); // General configuration bit
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word = pata_read_single_word();
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uart_puts_p ( PSTR ( "Number of logical cylinders: " ) );
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uart_putw_dec(word);
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uart_putc('\n');
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word = pata_read_single_word(); // Specific configuration
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word = pata_read_single_word();
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uart_puts_p ( PSTR ( "Number of logical heads: " ) );
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uart_putw_dec(word);
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uart_putc('\n');
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word = pata_read_single_word();
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word = pata_read_single_word();
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word = pata_read_single_word();
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uart_puts_p ( PSTR ( "Number of logical sectors per logical track: " ) );
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uart_putw_dec(word);
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uart_putc('\n');
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word = pata_read_single_word(); // CompactFlash
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word = pata_read_single_word(); // CompactFlash
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word = pata_read_single_word(); // Retired
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uart_puts_p ( PSTR ( "Serial number: " ) );
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for(uint8_t i=0;i<10;i++) {
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word = pata_read_single_word();
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byte_h = word >> 8;
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byte_l = word & 0x00FF;
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uart_putc(byte_h);
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uart_putc(byte_l);
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}
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uart_putc('\n');
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word = pata_read_single_word(); // Retired
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word = pata_read_single_word(); // Retired
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word = pata_read_single_word(); // Obsolete
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uart_puts_p ( PSTR ( "Firmware revision: " ) );
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for(uint8_t i=0;i<4;i++) {
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word = pata_read_single_word();
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byte_h = word >> 8;
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byte_l = word & 0x00FF;
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uart_putc(byte_h);
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uart_putc(byte_l);
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}
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uart_putc('\n');
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uart_puts_p ( PSTR ( "Model number: " ) );
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for(uint8_t i=0;i<20;i++) {
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word = pata_read_single_word();
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byte_h = word >> 8;
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byte_l = word & 0x00FF;
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uart_putc(byte_h);
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uart_putc(byte_l);
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}
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uart_putc('\n');
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word = pata_read_single_word(); // no idea
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word = pata_read_single_word(); // Reserved
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word = pata_read_single_word(); // Capabilities
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word = pata_read_single_word(); // Capabilities
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word = pata_read_single_word(); // Obsolete
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word = pata_read_single_word(); // Obsolete
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word = pata_read_single_word(); // Reserved
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word = pata_read_single_word();
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uart_puts_p ( PSTR ( "Number of current logical cylinders: " ) );
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uart_putw_dec(word);
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uart_putc('\n');
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word = pata_read_single_word();
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uart_puts_p ( PSTR ( "Number of current logical heads: " ) );
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uart_putw_dec(word);
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uart_putc('\n');
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word = pata_read_single_word();
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uart_puts_p ( PSTR ( "Number of current logical sectors per track: " ) );
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uart_putw_dec(word);
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uart_putc('\n');
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word = pata_read_single_word();
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dword = word;
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word = pata_read_single_word();
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dword |= (uint32_t)word<<16;
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uart_puts_p ( PSTR ( "Current capacity in sectors: " ) );
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uart_putdw_dec(dword);
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uart_putc('\n');
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word = pata_read_single_word(); // Reserved
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word = pata_read_single_word();
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dword = word;
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word = pata_read_single_word();
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dword |= (uint32_t)word <<16;
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uart_puts_p ( PSTR ( "Total number of user addressable sectors (LBA mode only): " ) );
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uart_putdw_dec(dword);
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uart_putc('\n');
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word = pata_read_single_word(); // Obsolete
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for(uint8_t i=0;i<193;i++)
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word = pata_read_single_word(); // ignore it
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}
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uint8_t pata_rdy()
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{
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uint8_t i;
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if ( ata_get_status_byte() & ATA_STAT_RDY )
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i = 1;
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else
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i = 0;
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return i;
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}
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uint8_t pata_bsy()
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{
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uint8_t i;
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if ( ata_get_status_byte() & ATA_STAT_BSY )
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i = 1;
|
||||
else
|
||||
i = 0;
|
||||
return i;
|
||||
}
|
||||
|
||||
uint8_t pata_drq()
|
||||
{
|
||||
uint8_t i;
|
||||
if ( ata_get_status_byte() & ATA_STAT_DRQ )
|
||||
i = 1;
|
||||
else
|
||||
i = 0;
|
||||
return i;
|
||||
}
|
||||
|
||||
void pata_cmd ( uint8_t cmd )
|
||||
{
|
||||
ata_cs0_enable();
|
||||
pata_write_byte ( cmd );
|
||||
ata_ctl_high();
|
||||
}
|
||||
|
||||
uint8_t pata_read_block ( uint32_t addr, uint8_t *buffer )
|
||||
{
|
||||
return 1;
|
||||
|
|
|
|||
|
|
@ -26,16 +26,12 @@
|
|||
*/
|
||||
|
||||
/*
|
||||
* $Id: wdc_drv_pata.h,v 1.3 2012/06/14 20:24:24 olivleh1 Exp $
|
||||
* $Id: wdc_drv_pata.h,v 1.4 2012/06/15 22:42:42 olivleh1 Exp $
|
||||
*/
|
||||
|
||||
#ifndef WDC_DRV_PATA_H_
|
||||
#define WDC_DRV_PATA_H_
|
||||
|
||||
extern void pata_set_highbyte(uint8_t byte);
|
||||
extern void pata_set_lowbyte(uint8_t byte);
|
||||
extern void pata_send_data();
|
||||
|
||||
extern uint8_t pata_init ();
|
||||
|
||||
extern uint8_t pata_read_block ( uint32_t addr, uint8_t *buffer );
|
||||
|
|
@ -44,4 +40,67 @@ extern uint8_t pata_write_block ( uint32_t addr, uint8_t *buffer );
|
|||
extern uint8_t pata_read_multiblock ( uint32_t addr, uint8_t *buffer, uint8_t numblocks );
|
||||
extern uint8_t pata_write_multiblock ( uint32_t addr, uint8_t *buffer, uint8_t numblocks );
|
||||
|
||||
|
||||
#define ATA_STAT_BSY 0x80 // ATA busy
|
||||
#define ATA_STAT_RDY 0x40 // ATA ready
|
||||
#define ATA_STAT_DF 0x20 // ATA device fault
|
||||
#define ATA_STAT_SKC 0x10 // ATA seek complete
|
||||
#define ATA_STAT_DRQ 0x08 // ATA data request
|
||||
#define ATA_STAT_CORR 0x04 // ATA corrected
|
||||
#define ATA_STAT_IDX 0x02 // ATA index
|
||||
#define ATA_STAT_ERR 0x01 // ATA error
|
||||
|
||||
#define ATA_DH_DEV0 0xE0
|
||||
#define ATA_DH_DEV1 0xF0
|
||||
|
||||
//ATA commands (from ATA-3),
|
||||
#define CMD_CFA_ERASE_SECTORS 0xC0
|
||||
#define CMD_CFA_REQUEST_EXT_ERR_CODE 0x03
|
||||
#define CMD_CFA_TRANSLATE_SECTOR 0x87
|
||||
#define CMD_CFA_WRITE_MULTIPLE_WO_ERASE 0xCD
|
||||
#define CMD_CFA_WRITE_SECTORS_WO_ERASE 0x38
|
||||
#define CMD_CHECK_POWER_MODE1 0xE5
|
||||
#define CMD_CHECK_POWER_MODE2 0x98
|
||||
#define CMD_DEVICE_RESET 0x08
|
||||
#define CMD_EXECUTE_DEVICE_DIAGNOSTIC 0x90
|
||||
#define CMD_FLUSH_CACHE 0xE7
|
||||
#define CMD_FORMAT_TRACK 0x50
|
||||
#define CMD_IDENTIFY_DEVICE 0xEC
|
||||
#define CMD_IDENTIFY_DEVICE_PACKET 0xA1
|
||||
#define CMD_IDENTIFY_PACKET_DEVICE 0xA1
|
||||
#define CMD_IDLE1 0xE3
|
||||
#define CMD_IDLE2 0x97
|
||||
#define CMD_IDLE_IMMEDIATE1 0xE1
|
||||
#define CMD_IDLE_IMMEDIATE2 0x95
|
||||
#define CMD_INITIALIZE_DRIVE_PARAMETERS 0x91
|
||||
#define CMD_INITIALIZE_DEVICE_PARAMETERS 0x91
|
||||
#define CMD_NOP 0x00
|
||||
#define CMD_PACKET 0xA0
|
||||
#define CMD_READ_BUFFER 0xE4
|
||||
#define CMD_READ_DMA 0xC8
|
||||
#define CMD_READ_DMA_QUEUED 0xC7
|
||||
#define CMD_READ_MULTIPLE 0xC4
|
||||
#define CMD_READ_SECTORS 0x20
|
||||
#define CMD_READ_VERIFY_SECTORS 0x40
|
||||
#define CMD_RECALIBRATE 0x10
|
||||
#define CMD_SEEK 0x70
|
||||
#define CMD_SET_FEATURES 0xEF
|
||||
#define CMD_SET_MULTIPLE_MODE 0xC6
|
||||
#define CMD_SLEEP1 0xE6
|
||||
#define CMD_SLEEP2 0x99
|
||||
#define CMD_STANDBY1 0xE2
|
||||
#define CMD_STANDBY2 0x96
|
||||
#define CMD_STANDBY_IMMEDIATE1 0xE0
|
||||
#define CMD_STANDBY_IMMEDIATE2 0x94
|
||||
#define CMD_WRITE_BUFFER 0xE8
|
||||
#define CMD_WRITE_DMA 0xCA
|
||||
#define CMD_WRITE_DMA_QUEUED 0xCC
|
||||
#define CMD_WRITE_MULTIPLE 0xC5
|
||||
#define CMD_WRITE_SECTORS 0x30
|
||||
#define CMD_WRITE_VERIFY 0x3C
|
||||
|
||||
// CB_DH bits 7-4 OF THE DEVICE/HEAD REGISTER
|
||||
#define ATA_DH_DEV0 0xE0 // select device 0 LBA MODE
|
||||
#define ATA_DH_DEV1 0xF0 // select device 1 LBA MODE
|
||||
|
||||
#endif /* WDC_DRV_PATA_H_ */
|
||||
Loading…
Reference in New Issue