diff --git a/P8000_WDC_Emulator/P8000_WDC_Emulator/wdc_drv_pata.c b/P8000_WDC_Emulator/P8000_WDC_Emulator/wdc_drv_pata.c index 42835ad..f8acd69 100644 --- a/P8000_WDC_Emulator/P8000_WDC_Emulator/wdc_drv_pata.c +++ b/P8000_WDC_Emulator/P8000_WDC_Emulator/wdc_drv_pata.c @@ -26,7 +26,7 @@ */ /* - * $Id: wdc_drv_pata.c,v 1.12 2013/04/23 20:08:41 olivleh1 Exp $ + * $Id: wdc_drv_pata.c,v 1.13 2013/05/04 21:29:43 olivleh1 Exp $ */ #include "wdc_config.h" @@ -36,19 +36,19 @@ #include "uart.h" #include "wdc_drv_pata.h" -uint8_t pata_bsy(); -uint8_t pata_rdy(); -uint8_t pata_drq(); -uint8_t pata_err(); -void ata_identify(); -void pata_set_highbyte ( uint8_t byte ); -void pata_set_lowbyte ( uint8_t byte ); -uint8_t pata_get_highbyte(); -uint8_t pata_get_lowbyte(); -void set_io_register ( uint8_t ioreg ); +uint8_t pata_bsy (); +uint8_t pata_rdy (); +uint8_t pata_drq (); +uint8_t pata_err (); +void ata_identify (); +void pata_set_highbyte ( uint8_t byte ); +void pata_set_lowbyte ( uint8_t byte ); +uint8_t pata_get_highbyte (); +uint8_t pata_get_lowbyte (); +void set_io_register ( uint8_t ioreg ); uint8_t read_io_register ( uint8_t ioreg ); -void write_io_register ( uint8_t ioreg, uint8_t byte ); -void pata_read_bytes ( uint8_t *buffer, uint16_t bytes ); +void write_io_register ( uint8_t ioreg, uint8_t byte ); +void pata_read_bytes ( uint8_t *buffer, uint16_t bytes ); /* @@ -72,7 +72,7 @@ void pata_read_bytes ( uint8_t *buffer, uint16_t bytes ); #define PATA_RW_CYLINDER_HIGH_REGISTER 0x0D /* 0b01101 */ #define PATA_RW_DEVICE_HEAD_REGISTER 0x0B /* 0b01011 */ -#define ata_ctl_high() ata_cs0_disable();ata_cs1_disable();ata_da0_disable();ata_da1_disable();ata_da2_disable(); +#define ata_ctl_high() ata_cs0_disable(); ata_cs1_disable(); ata_da0_disable(); ata_da1_disable(); ata_da2_disable(); /* @@ -80,41 +80,45 @@ void pata_read_bytes ( uint8_t *buffer, uint16_t bytes ); */ -uint8_t pata_rdy() +uint8_t pata_rdy () { return ( read_io_register ( PATA_R_STATUS_REGISTER ) & ATA_STAT_RDY ) ? 1 : 0; } -uint8_t pata_bsy() +uint8_t pata_bsy () { return ( read_io_register ( PATA_R_STATUS_REGISTER ) & ATA_STAT_BSY ) ? 1 : 0; } -uint8_t pata_drq() +uint8_t pata_drq () { return ( read_io_register ( PATA_R_STATUS_REGISTER ) & ATA_STAT_DRQ ) ? 1 : 0; } -uint8_t pata_err() +uint8_t pata_err () { return ( read_io_register ( PATA_R_STATUS_REGISTER ) & ATA_STAT_ERR ) ? 1 : 0; } void set_io_register ( uint8_t ioreg ) { - if ( ! ( ioreg & ( 1 << 0 ) ) ) + if ( !( ioreg & ( 1 << 0 ) ) ) { ata_da2_enable(); - if ( ! ( ioreg & ( 1 << 1 ) ) ) + } + if ( !( ioreg & ( 1 << 1 ) ) ) { ata_da1_enable(); - if ( ! ( ioreg & ( 1 << 2 ) ) ) + } + if ( !( ioreg & ( 1 << 2 ) ) ) { ata_da0_enable(); - if ( ! ( ioreg & ( 1 << 3 ) ) ) + } + if ( !( ioreg & ( 1 << 3 ) ) ) { ata_cs1_enable(); - if ( ! ( ioreg & ( 1 << 4 ) ) ) + } + if ( !( ioreg & ( 1 << 4 ) ) ) { ata_cs0_enable(); + } } - void pata_set_lowbyte ( uint8_t byte ) { port_data_set ( byte ); @@ -144,7 +148,7 @@ uint8_t pata_get_lowbyte () byte = port_data_get(); disable_rdwrtoata(); - return ( byte ); + return byte; } uint8_t pata_get_highbyte () @@ -189,13 +193,13 @@ void write_io_register ( uint8_t ioreg, uint8_t byte ) void pata_read_bytes ( uint8_t *buffer, uint16_t bytes ) { uint16_t i; - uint8_t blocks; + uint8_t blocks; configure_port_data_read(); - for ( blocks = bytes / PATA_BLOCKLEN ; blocks ; blocks-- ) { + for ( blocks = bytes / PATA_BLOCKLEN; blocks; blocks-- ) { /* Wait for BSY goes low and DRQ goes high */ - while ( pata_bsy() & !pata_drq() ); + while ( pata_bsy() & !pata_drq() ) {} /* PATA_RW_DATA_REGISTER */ ata_cs0_enable(); @@ -217,16 +221,15 @@ void pata_read_bytes ( uint8_t *buffer, uint16_t bytes ) } } - void pata_write_bytes ( uint8_t *buffer, uint16_t bytes ) { uint16_t i, a; - uint8_t blocks; + uint8_t blocks; a = 0; - for ( blocks = bytes / PATA_BLOCKLEN ; blocks ; blocks-- ) { + for ( blocks = bytes / PATA_BLOCKLEN; blocks; blocks-- ) { /* Wait for BSY goes low and DRQ goes high */ - while ( pata_bsy() & !pata_drq() ); + while ( pata_bsy() & !pata_drq() ) {} configure_port_data_write(); @@ -251,12 +254,12 @@ void pata_write_bytes ( uint8_t *buffer, uint16_t bytes ) } } -void ata_identify() +void ata_identify () { - uint8_t buffer[512], i; + uint8_t buffer[512], i; uint16_t word[256], n; - while ( pata_bsy() ); + while ( pata_bsy() ) {} write_io_register ( PATA_W_COMMAND_REGISTER, CMD_IDENTIFY_DEVICE ); pata_read_bytes ( buffer, 512 ); @@ -267,58 +270,56 @@ void ata_identify() i++; } - uart_puts_p ( PSTR ( "Number of logical cylinders: " ) ); + uart_putstring ( PSTR ( "INFO: Number of logical cylinders: " ), false ); uart_putw_dec ( word[1] ); - uart_putc ( '\n' ); - uart_puts_p ( PSTR ( "Number of logical heads: " ) ); + uart_put_nl(); + uart_putstring ( PSTR ( "INFO: Number of logical heads: " ), false ); uart_putw_dec ( word[3] ); - uart_putc ( '\n' ); - uart_puts_p ( PSTR ( "Number of logical sectors per logical track: " ) ); + uart_put_nl(); + uart_putstring ( PSTR ( "INFO: Number of logical sectors per logical track: " ), false ); uart_putw_dec ( word[6] ); - uart_putc ( '\n' ); - uart_puts_p ( PSTR ( "Serial number: " ) ); + uart_put_nl(); + uart_putstring ( PSTR ( "INFO: Serial number: " ), false ); for ( i = 10; i <= 19; i++ ) { uart_putc ( word[i] >> 8 ); uart_putc ( word[i] & 0x00FF ); } - uart_putc ( '\n' ); - uart_puts_p ( PSTR ( "Firmware revision: " ) ); + uart_put_nl(); + uart_putstring ( PSTR ( "INFO: Firmware revision: " ), false ); for ( i = 23; i <= 26; i++ ) { uart_putc ( word[i] >> 8 ); uart_putc ( word[i] & 0x00FF ); } - uart_putc ( '\n' ); - uart_puts_p ( PSTR ( "Model number: " ) ); + uart_put_nl(); + uart_putstring ( PSTR ( "INFO: Model number: " ), false ); for ( i = 27; i <= 46; i++ ) { uart_putc ( word[i] >> 8 ); uart_putc ( word[i] & 0x00FF ); } - uart_putc ( '\n' ); - uart_puts_p ( PSTR ( "Capabilities: " ) ); + uart_put_nl(); + uart_putstring ( PSTR ( "INFO: Capabilities: " ), false ); uart_putw_dec ( word[49] ); - uart_putc ( '\n' ); - uart_puts_p ( PSTR ( "Number of current logical cylinders: " ) ); + uart_put_nl(); + uart_putstring ( PSTR ( "INFO: Number of current logical cylinders: " ), false ); uart_putw_dec ( word[54] ); - uart_putc ( '\n' ); - uart_puts_p ( PSTR ( "Number of current logical heads: " ) ); + uart_put_nl(); + uart_putstring ( PSTR ( "INFO: Number of current logical heads: " ), false ); uart_putw_dec ( word[55] ); - uart_putc ( '\n' ); - uart_puts_p ( PSTR ( "Number of current logical sectors per track: " ) ); + uart_put_nl(); + uart_putstring ( PSTR ( "INFO: Number of current logical sectors per track: " ), false ); uart_putw_dec ( word[56] ); - uart_putc ( '\n' ); - uart_puts_p ( PSTR ( "Current capacity in sectors: " ) ); - uart_putdw_dec ( word[57] | ( uint32_t ) word[58] << 16 ); - uart_putc ( '\n' ); - uart_puts_p ( PSTR ( "Total number of user addressable sectors (LBA mode only): " ) ); - uart_putdw_dec ( word[60] | ( uint32_t ) word[61] << 16 ); - uart_putc ( '\n' ); - uart_puts_p ( PSTR ( "Minimum PIO transfer cycle time without flow control: " ) ); - uart_putdw_dec ( word[67] ); - uart_puts_p ( PSTR ( "ns\n" ) ); + uart_put_nl(); + uart_putstring ( PSTR ( "INFO: Current capacity in sectors: " ), false ); + uart_putdw_dec ( word[57] | (uint32_t)word[58] << 16 ); + uart_put_nl(); + uart_putstring ( PSTR ( "INFO: Total number of user addressable sectors (LBA mode only): " ), false ); + uart_putdw_dec ( word[60] | (uint32_t)word[61] << 16 ); + uart_put_nl(); + uart_putstring ( PSTR ( "INFO: Minimum PIO transfer cycle time without flow control: " ), false ); + uart_putdw_dec ( word[67] ); + uart_putstring ( PSTR ( "ns" ), true ); } - - /* * Public functions */ @@ -329,19 +330,19 @@ uint8_t pata_init () /* is needed for some disks (for example Maxtor 6L080J4) */ _delay_ms ( 400 ); - uart_puts_p ( PSTR ( "Init start\n" ) ); - while ( ( !pata_rdy() ) & pata_bsy() ); + uart_putstring ( PSTR ( "INFO: PATA init start" ), true ); + while ( ( !pata_rdy() ) & pata_bsy() ) {} /*set drive 0 to LBA mode*/ write_io_register ( PATA_RW_DEVICE_HEAD_REGISTER, ATA_LBA_DRIVE_0 ); - while ( ( !pata_rdy() ) & pata_bsy() ); + while ( ( !pata_rdy() ) & pata_bsy() ) {} /*recalibrate*/ write_io_register ( PATA_W_COMMAND_REGISTER, CMD_RECALIBRATE ); - while ( pata_bsy() ); + while ( pata_bsy() ) {} - uart_puts_p ( PSTR ( "disk is now ready\n" ) ); + uart_putstring ( PSTR ( "INFO: PATA disk has been found" ), true ); ata_identify(); return 0; @@ -357,7 +358,6 @@ uint8_t pata_write_block ( uint32_t addr, uint8_t *buffer ) return pata_write_multiblock ( addr, buffer, 1 ); } - typedef union { uint32_t value32; struct { @@ -458,7 +458,7 @@ uint8_t pata_write_multiblock ( uint32_t addr, uint8_t *buffer, uint8_t numblock pata_write_bytes ( buffer, numblocks * PATA_BLOCKLEN ); /* wait until drive completed write */ - while ( pata_bsy() ); + while ( pata_bsy() ) {} return pata_err(); } \ No newline at end of file